> It's big endian on big endian architectures. Which arhictecture(s) does big endian?
On Fri, Jul 31, 2009 at 11:29 AM, Jonas Maebe <jonas.ma...@elis.ugent.be>wrote: > > On 31 Jul 2009, at 13:21, Desmond Coertzen wrote: > > As far as endian is concerned: Integer types i found always to be little >> endian in most pascal compilers by default. >> > > It's big endian on big endian architectures. > > As far as the FPC compiler is concerned, this should not be a concern as >> it >> seems the decisions regarding the byte order was made and cemented in >> place >> long ago. But now that you guys mention byte order, are there directives >> in >> FPC where integer byte orders can be changed? >> > > No, it's always the native byte order of the underlying architecture. > > If language syntax might be extended to provide bit width accessibility >> for >> MCU's, i think the same methods must be followed throughout FPC: In all >> technical specifications I have come accross, bit 0 is always the least >> significant bit of any word regardless the size of the word. That makes >> things simple. >> > > At least in the PowerPC documentation (both from Motorola and IBM), bit 0 > is always the most significant bit. > > > Jonas > > _______________________________________________ > fpc-devel maillist - fpc-devel@lists.freepascal.org > http://lists.freepascal.org/mailman/listinfo/fpc-devel >
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