Felipe Monteiro de Carvalho wrote:
Hello,
What exactly are those exceptions of Misalligned data access on windows CE?
And why that doesn´t exist on x86 architecture?
It depends all on how a CPU accesses memory.
Suppose a CPU has a 8bit data bus to memory and you want to read a byte.
Since you have a 8bit bus, you are able to adress all individual
bytes, so reading is not a problem.
Now imagine a CPU with a 32bit databus and reading a byte. Data is read
in chuncks of 32bits (=4 bytes) and it is adressed by multiples of 4.
For getting the exact byte, the CPU "shifts" the right byte.
Now we do the same for reading a 32bits integer. On a 8 bit cpu, you
have to read 4 times one byte and then you have the integer.
On a 32bits CPU it can be read in one go if the adress is aligned to 4
bytes. If not, it has to be read in 2 halves and then combined to one
integer. The x86 supports reading like this, alltough it is inefficient.
The SPARC and some implementations of the ARM (*) don't support this and
raise a buserror if you read data like this.
(*) there are extentions to the ARM core which can handle it, but this
depends on what functionality the manufacturer of a specific core has
implemented.
Hope this made some thing clear.
Marc
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