On 03/11/18 02:52, Jun Zhao wrote:
> Enables macro block level bit rate control, that generally improves
> subjective visual quality. It may have a negative impact on
> performance and objective visual quality metrics. Default is off
> and can't compatible with Constant QP.
>
> Signed-off-by: Jun Zhao <jun.z...@intel.com>
> ---
> libavcodec/vaapi_encode_h264.c | 21 +++++++++++++++++++++
> 1 files changed, 21 insertions(+), 0 deletions(-)
>
> diff --git a/libavcodec/vaapi_encode_h264.c b/libavcodec/vaapi_encode_h264.c
> index 7bb77cf..060277b 100644
> --- a/libavcodec/vaapi_encode_h264.c
> +++ b/libavcodec/vaapi_encode_h264.c
> @@ -58,6 +58,7 @@ typedef struct VAAPIEncodeH264Context {
> int sei;
> int profile;
> int level;
> + int mb_rate_control;
>
> // Derived settings.
> int mb_width;
> @@ -889,6 +890,22 @@ static av_cold int
> vaapi_encode_h264_configure(AVCodecContext *avctx)
> return 0;
> }
>
> +static av_cold int vaapi_encode_h264_bit_rate_control(AVCodecContext *avctx)
> +{
> + VAAPIEncodeContext *ctx = avctx->priv_data;
> + VAAPIEncodeH264Context *priv = avctx->priv_data;
> +
> + if (priv->mb_rate_control) {
> + #if VA_CHECK_VERSION(0, 39, 2)
> + ctx->rc_params.rc.rc_flags.bits.mb_rate_control =
> priv->mb_rate_control;
> + #else
> + av_log(avctx, AV_LOG_WARNING, "The MB rate control option is not "
> + "supported with this VAAPI version.\n");
> + #endif
> + }
> + return 0;
> +}
> +
> static const VAAPIEncodeProfile vaapi_encode_h264_profiles[] = {
> { FF_PROFILE_H264_HIGH, 8, 3, 1, 1, VAProfileH264High },
> { FF_PROFILE_H264_MAIN, 8, 3, 1, 1, VAProfileH264Main },
> @@ -904,6 +921,8 @@ static const VAAPIEncodeType vaapi_encode_type_h264 = {
>
> .configure = &vaapi_encode_h264_configure,
>
> + .bit_rate_control = &vaapi_encode_h264_bit_rate_control,
> +
> .sequence_params_size = sizeof(VAEncSequenceParameterBufferH264),
> .init_sequence_params = &vaapi_encode_h264_init_sequence_params,
>
> @@ -1001,6 +1020,8 @@ static const AVOption vaapi_encode_h264_options[] = {
> OFFSET(qp), AV_OPT_TYPE_INT, { .i64 = 20 }, 0, 52, FLAGS },
> { "quality", "Set encode quality (trades off against speed, higher is
> faster)",
> OFFSET(quality), AV_OPT_TYPE_INT, { .i64 = -1 }, -1, INT_MAX, FLAGS },
> + { "mb_rate_control", "MB level bitrate control (only supported on
> GEN9+)",
> + OFFSET(mb_rate_control), AV_OPT_TYPE_BOOL, { .i64 = 0 }, 0, 1, FLAGS,
> "mb_rate_control" },
> { "coder", "Entropy coder type",
> OFFSET(coder), AV_OPT_TYPE_INT, { .i64 = 1 }, 0, 1, FLAGS, "coder" },
> { "cavlc", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = 0 }, INT_MIN,
> INT_MAX, FLAGS, "coder" },
>
Enabling this option still completely kills the GPU on my Skylake (6300) test
machine (in I think older kernel versions this also caused the whole machine to
hard-reset immediately, in current ones it only kills the GPU requiring a
reboot to fix). See <https://github.com/intel/intel-vaapi-driver/issues/172>.
- Mark
E.g., from 4.18.10:
[ 138.818477] [drm] GPU HANG: ecode 9:0:0x8fd8ffff, in ffmpeg_g [595], reason:
hang on rcs0, action: reset
[ 138.819029] [drm] GPU hangs can indicate a bug anywhere in the entire gfx
stack, including userspace.
[ 138.819604] [drm] Please file a _new_ bug report on bugs.freedesktop.org
against DRI -> DRM/Intel
[ 138.820190] [drm] drm/i915 developers can then reassign to the right
component if it's not a kernel issue.
[ 138.820787] [drm] The gpu crash dump is required to analyze gpu hangs, so
please always attach it.
[ 138.821394] [drm] GPU crash dump saved to /sys/class/drm/card0/error
[ 138.822022] i915 0000:00:02.0: Resetting rcs0 for hang on rcs0
[ 146.811837] i915 0000:00:02.0: Resetting rcs0 for hang on rcs0
[ 146.815773] [drm:gen8_reset_engines [i915]] *ERROR* rcs0: reset request
timeout
[ 146.817686] i915 0000:00:02.0: Resetting chip for hang on rcs0
[ 146.819565] [drm:gen8_reset_engines [i915]] *ERROR* rcs0: reset request
timeout
[ 146.929115] [drm:gen8_reset_engines [i915]] *ERROR* rcs0: reset request
timeout
[ 147.041196] [drm:gen8_reset_engines [i915]] *ERROR* rcs0: reset request
timeout
[ 147.151935] i915 0000:00:02.0: Failed to reset chip
[ 147.156055] [drm:gen8_reset_engines [i915]] *ERROR* rcs0: reset request
timeout
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