---
configure | 6 +++++-
doc/APIchanges | 3 +++
libavutil/cpu.c | 6 +++++-
libavutil/cpu.h | 1 +
libavutil/version.h | 2 +-
libavutil/x86/cpu.c | 2 ++
libavutil/x86/cpu.h | 3 +++
libavutil/x86/x86inc.asm | 41 +++++++++++++++++++++--------------------
tests/checkasm/checkasm.c | 1 +
9 files changed, 42 insertions(+), 23 deletions(-)
diff --git a/configure b/configure
index 7e55e92..5fce495 100755
--- a/configure
+++ b/configure
@@ -367,6 +367,7 @@ Optimization options (experts only):
--disable-fma3 disable FMA3 optimizations
--disable-fma4 disable FMA4 optimizations
--disable-avx2 disable AVX2 optimizations
+ --disable-aesni disable AESNI optimizations
--disable-armv5te disable armv5te optimizations
--disable-armv6 disable armv6 optimizations
--disable-armv6t2 disable armv6t2 optimizations
@@ -1633,6 +1634,7 @@ ARCH_EXT_LIST_LOONGSON="
"
ARCH_EXT_LIST_X86_SIMD="
+ aesni
amd3dnow
amd3dnowext
avx
@@ -2125,7 +2127,8 @@ sse3_deps="sse2"
ssse3_deps="sse3"
sse4_deps="ssse3"
sse42_deps="sse4"
-avx_deps="sse42"
+aesni_deps="sse42"
+avx_deps="aesni"
xop_deps="avx"
fma3_deps="avx"
fma4_deps="avx"
@@ -5982,6 +5985,7 @@ if enabled x86; then
echo "3DNow! extended enabled ${amd3dnowext-no}"
echo "SSE enabled ${sse-no}"
echo "SSSE3 enabled ${ssse3-no}"
+ echo "AESNI enabled ${aesni-no}"
echo "AVX enabled ${avx-no}"
echo "XOP enabled ${xop-no}"
echo "FMA3 enabled ${fma3-no}"
diff --git a/doc/APIchanges b/doc/APIchanges
index 67605dc..65f817c 100644
--- a/doc/APIchanges
+++ b/doc/APIchanges
@@ -15,6 +15,9 @@ libavutil: 2015-08-28
API changes, most recent first:
+2015-10-11 - xxxxxxx - lavu 55.4.100 - cpu.h
+ Add AV_CPU_FLAG_AESNI.
+
2015-09-29 - xxxxxxx - lavc 57.3.100 / lavc 57.2.0 - avcodec.h
Change type of AVPacket.duration from int to int64_t.
diff --git a/libavutil/cpu.c b/libavutil/cpu.c
index 780368d..09db4d0 100644
--- a/libavutil/cpu.c
+++ b/libavutil/cpu.c
@@ -111,7 +111,8 @@ int av_parse_cpu_flags(const char *s)
#define CPUFLAG_SSSE3 (AV_CPU_FLAG_SSSE3 | CPUFLAG_SSE3)
#define CPUFLAG_SSE4 (AV_CPU_FLAG_SSE4 | CPUFLAG_SSSE3)
#define CPUFLAG_SSE42 (AV_CPU_FLAG_SSE42 | CPUFLAG_SSE4)
-#define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_SSE42)
+#define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)
+#define CPUFLAG_AVX (AV_CPU_FLAG_AVX | CPUFLAG_AESNI)
#define CPUFLAG_AVXSLOW (AV_CPU_FLAG_AVXSLOW | CPUFLAG_AVX)
#define CPUFLAG_XOP (AV_CPU_FLAG_XOP | CPUFLAG_AVX)
#define CPUFLAG_FMA3 (AV_CPU_FLAG_FMA3 | CPUFLAG_AVX)
@@ -134,6 +135,7 @@ int av_parse_cpu_flags(const char *s)
{ "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM
}, .unit = "flags" },
{ "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE4
}, .unit = "flags" },
{ "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_SSE42
}, .unit = "flags" },
+ { "aesni" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AESNI
}, .unit = "flags" },
{ "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVX
}, .unit = "flags" },
{ "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_AVXSLOW
}, .unit = "flags" },
{ "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_XOP
}, .unit = "flags" },
@@ -194,6 +196,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
{ "atom" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ATOM
}, .unit = "flags" },
{ "sse4.1" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE4
}, .unit = "flags" },
{ "sse4.2" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_SSE42
}, .unit = "flags" },
+ { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI
}, .unit = "flags" },
{ "avx" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVX
}, .unit = "flags" },
{ "avxslow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AVXSLOW
}, .unit = "flags" },
{ "xop" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_XOP
}, .unit = "flags" },
@@ -323,6 +326,7 @@ static const struct {
{ AV_CPU_FLAG_ATOM, "atom" },
{ AV_CPU_FLAG_SSE4, "sse4.1" },
{ AV_CPU_FLAG_SSE42, "sse4.2" },
+ { AV_CPU_FLAG_AESNI, "aesni" },
{ AV_CPU_FLAG_AVX, "avx" },
{ AV_CPU_FLAG_AVXSLOW, "avxslow" },
{ AV_CPU_FLAG_XOP, "xop" },
diff --git a/libavutil/cpu.h b/libavutil/cpu.h
index 9403eca..bff8518 100644
--- a/libavutil/cpu.h
+++ b/libavutil/cpu.h
@@ -42,6 +42,7 @@
#define AV_CPU_FLAG_ATOM 0x10000000 ///< Atom processor, some SSSE3
instructions are slower
#define AV_CPU_FLAG_SSE4 0x0100 ///< Penryn SSE4.1 functions
#define AV_CPU_FLAG_SSE42 0x0200 ///< Nehalem SSE4.2 functions
+#define AV_CPU_FLAG_AESNI 0x80000 ///< Advanced Encryption Standard
functions
#define AV_CPU_FLAG_AVX 0x4000 ///< AVX functions: requires OS
support even if YMM registers aren't used
#define AV_CPU_FLAG_AVXSLOW 0x8000000 ///< AVX supported, but slow when
using YMM registers (e.g. Bulldozer)
#define AV_CPU_FLAG_XOP 0x0400 ///< Bulldozer XOP functions
diff --git a/libavutil/version.h b/libavutil/version.h
index e39034d..827f178 100644
--- a/libavutil/version.h
+++ b/libavutil/version.h
@@ -56,7 +56,7 @@
*/
#define LIBAVUTIL_VERSION_MAJOR 55
-#define LIBAVUTIL_VERSION_MINOR 3
+#define LIBAVUTIL_VERSION_MINOR 4
#define LIBAVUTIL_VERSION_MICRO 100
#define LIBAVUTIL_VERSION_INT AV_VERSION_INT(LIBAVUTIL_VERSION_MAJOR, \
diff --git a/libavutil/x86/cpu.c b/libavutil/x86/cpu.c
index 7a5d4e6..f57d72d 100644
--- a/libavutil/x86/cpu.c
+++ b/libavutil/x86/cpu.c
@@ -126,6 +126,8 @@ int ff_get_cpu_flags_x86(void)
rval |= AV_CPU_FLAG_SSE4;
if (ecx & 0x00100000 )
rval |= AV_CPU_FLAG_SSE42;
+ if (ecx & 0x01000000 )
+ rval |= AV_CPU_FLAG_AESNI;
#if HAVE_AVX
/* Check OXSAVE and AVX bits */
if ((ecx & 0x18000000) == 0x18000000) {
diff --git a/libavutil/x86/cpu.h b/libavutil/x86/cpu.h
index 1cea419..dc102c6 100644
--- a/libavutil/x86/cpu.h
+++ b/libavutil/x86/cpu.h
@@ -47,6 +47,7 @@
#define X86_FMA3(flags) CPUEXT(flags, FMA3)
#define X86_FMA4(flags) CPUEXT(flags, FMA4)
#define X86_AVX2(flags) CPUEXT(flags, AVX2)
+#define X86_AESNI(flags) CPUEXT(flags, AESNI)
#define EXTERNAL_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOW)
#define EXTERNAL_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _EXTERNAL,
AMD3DNOWEXT)
@@ -69,6 +70,7 @@
#define EXTERNAL_FMA3(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA3)
#define EXTERNAL_FMA4(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA4)
#define EXTERNAL_AVX2(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX2)
+#define EXTERNAL_AESNI(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AESNI)
#define INLINE_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOW)
#define INLINE_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOWEXT)
@@ -91,6 +93,7 @@
#define INLINE_FMA3(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA3)
#define INLINE_FMA4(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA4)
#define INLINE_AVX2(flags) CPUEXT_SUFFIX(flags, _INLINE, AVX2)
+#define INLINE_AESNI(flags) CPUEXT_SUFFIX(flags, _INLINE, AESNI)
void ff_cpu_cpuid(int index, int *eax, int *ebx, int *ecx, int *edx);
void ff_cpu_xgetbv(int op, int *eax, int *edx);
diff --git a/libavutil/x86/x86inc.asm b/libavutil/x86/x86inc.asm
index afcd6b8..f00d1c0 100644
--- a/libavutil/x86/x86inc.asm
+++ b/libavutil/x86/x86inc.asm
@@ -758,20 +758,21 @@ BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg,
jge, jng, jnge, ja, jae,
%assign cpuflags_ssse3 (1<<8) | cpuflags_sse3
%assign cpuflags_sse4 (1<<9) | cpuflags_ssse3
%assign cpuflags_sse42 (1<<10)| cpuflags_sse4
-%assign cpuflags_avx (1<<11)| cpuflags_sse42
-%assign cpuflags_xop (1<<12)| cpuflags_avx
-%assign cpuflags_fma4 (1<<13)| cpuflags_avx
-%assign cpuflags_fma3 (1<<14)| cpuflags_avx
-%assign cpuflags_avx2 (1<<15)| cpuflags_fma3
-
-%assign cpuflags_cache32 (1<<16)
-%assign cpuflags_cache64 (1<<17)
-%assign cpuflags_slowctz (1<<18)
-%assign cpuflags_lzcnt (1<<19)
-%assign cpuflags_aligned (1<<20) ; not a cpu feature, but a function variant
-%assign cpuflags_atom (1<<21)
-%assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
-%assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
+%assign cpuflags_aesni (1<<11)| cpuflags_sse42
+%assign cpuflags_avx (1<<12)| cpuflags_aesni
+%assign cpuflags_xop (1<<13)| cpuflags_avx
+%assign cpuflags_fma4 (1<<14)| cpuflags_avx
+%assign cpuflags_fma3 (1<<15)| cpuflags_avx
+%assign cpuflags_avx2 (1<<16)| cpuflags_fma3
+
+%assign cpuflags_cache32 (1<<17)
+%assign cpuflags_cache64 (1<<18)
+%assign cpuflags_slowctz (1<<19)
+%assign cpuflags_lzcnt (1<<20)
+%assign cpuflags_aligned (1<<21) ; not a cpu feature, but a function variant
+%assign cpuflags_atom (1<<22)
+%assign cpuflags_bmi1 (1<<23)|cpuflags_lzcnt
+%assign cpuflags_bmi2 (1<<24)|cpuflags_bmi1
; Returns a boolean value expressing whether or not the specified cpuflag is
enabled.
%define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x)) -
1) >> 31) & 1)
@@ -1171,12 +1172,12 @@ AVX_INSTR addsd, sse2, 1, 0, 1
AVX_INSTR addss, sse, 1, 0, 1
AVX_INSTR addsubpd, sse3, 1, 0, 0
AVX_INSTR addsubps, sse3, 1, 0, 0
-AVX_INSTR aesdec, fnord, 0, 0, 0
-AVX_INSTR aesdeclast, fnord, 0, 0, 0
-AVX_INSTR aesenc, fnord, 0, 0, 0
-AVX_INSTR aesenclast, fnord, 0, 0, 0
-AVX_INSTR aesimc
-AVX_INSTR aeskeygenassist
+AVX_INSTR aesdec, aesni, 0, 0, 0
+AVX_INSTR aesdeclast, aesni, 0, 0, 0
+AVX_INSTR aesenc, aesni, 0, 0, 0
+AVX_INSTR aesenclast, aesni, 0, 0, 0
+AVX_INSTR aesimc, aesni
+AVX_INSTR aeskeygenassist, aesni
AVX_INSTR andnpd, sse2, 1, 0, 0
AVX_INSTR andnps, sse, 1, 0, 0
AVX_INSTR andpd, sse2, 1, 0, 1
diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
index bba2dbc..2e3d393 100644
--- a/tests/checkasm/checkasm.c
+++ b/tests/checkasm/checkasm.c
@@ -117,6 +117,7 @@ static const struct {
{ "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM },
{ "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 },
{ "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 },
+ { "AESNI", "aesni", AV_CPU_FLAG_AESNI },
{ "AVX", "avx", AV_CPU_FLAG_AVX },
{ "XOP", "xop", AV_CPU_FLAG_XOP },
{ "FMA3", "fma3", AV_CPU_FLAG_FMA3 },
--
2.6.0
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