On 10/12/2015 12:20 AM, Rodger Combs wrote:
> ---
> configure | 4 ++++
> libavutil/cpu.c | 3 +++
> libavutil/cpu.h | 1 +
> libavutil/x86/cpu.c | 2 ++
> libavutil/x86/cpu.h | 3 +++
> libavutil/x86/x86inc.asm | 1 +
> tests/checkasm/checkasm.c | 1 +
APIChanges entry and version.h bump are missing.
> 7 files changed, 15 insertions(+)
>
> diff --git a/configure b/configure
> index 7e55e92..79d4449 100755
> --- a/configure
> +++ b/configure
> @@ -367,6 +367,7 @@ Optimization options (experts only):
> --disable-fma3 disable FMA3 optimizations
> --disable-fma4 disable FMA4 optimizations
> --disable-avx2 disable AVX2 optimizations
> + --disable-aesni disable AESNI optimizations
> --disable-armv5te disable armv5te optimizations
> --disable-armv6 disable armv6 optimizations
> --disable-armv6t2 disable armv6t2 optimizations
> @@ -1633,6 +1634,7 @@ ARCH_EXT_LIST_LOONGSON="
> "
>
> ARCH_EXT_LIST_X86_SIMD="
> + aesni
> amd3dnow
> amd3dnowext
> avx
> @@ -2130,6 +2132,7 @@ xop_deps="avx"
> fma3_deps="avx"
> fma4_deps="avx"
> avx2_deps="avx"
> +aesni_deps="sse2"
If we follow the existing pattern, aesni should go after sse4.2 and
depend on it.
>
> mmx_external_deps="yasm"
> mmx_inline_deps="inline_asm"
> @@ -5986,6 +5989,7 @@ if enabled x86; then
> echo "XOP enabled ${xop-no}"
> echo "FMA3 enabled ${fma3-no}"
> echo "FMA4 enabled ${fma4-no}"
> + echo "AESNI enabled ${aesni-no}"
> echo "i686 features enabled ${i686-no}"
> echo "CMOV is fast ${fast_cmov-no}"
> echo "EBX available ${ebx_available-no}"
> diff --git a/libavutil/cpu.c b/libavutil/cpu.c
> index 780368d..c1f06c6 100644
> --- a/libavutil/cpu.c
> +++ b/libavutil/cpu.c
> @@ -145,6 +145,7 @@ int av_parse_cpu_flags(const char *s)
> { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOW
> }, .unit = "flags" },
> { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = CPUFLAG_3DNOWEXT
> }, .unit = "flags" },
> { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV
> }, .unit = "flags" },
> + { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI
> }, .unit = "flags" },
Add a "#define CPUFLAG_AESNI (AV_CPU_FLAG_AESNI | CPUFLAG_SSE42)" line
above this and use the define here. Also change the CPUFLAG_AVX define
to include this new one instead of CPUFLAG_SSE42.
Every CPU supporting aesni supports at the very least sse4.2
> #elif ARCH_ARM
> { "armv5te", NULL, 0, AV_OPT_TYPE_CONST, { .i64 =
> AV_CPU_FLAG_ARMV5TE }, .unit = "flags" },
> { "armv6", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_ARMV6
> }, .unit = "flags" },
> @@ -205,6 +206,7 @@ int av_parse_cpu_caps(unsigned *flags, const char *s)
> { "3dnow" , NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_3DNOW
> }, .unit = "flags" },
> { "3dnowext", NULL, 0, AV_OPT_TYPE_CONST, { .i64 =
> AV_CPU_FLAG_3DNOWEXT }, .unit = "flags" },
> { "cmov", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_CMOV
> }, .unit = "flags" },
> + { "aesni", NULL, 0, AV_OPT_TYPE_CONST, { .i64 = AV_CPU_FLAG_AESNI
> }, .unit = "flags" },
>
> #define CPU_FLAG_P2 AV_CPU_FLAG_CMOV | AV_CPU_FLAG_MMX
> #define CPU_FLAG_P3 CPU_FLAG_P2 | AV_CPU_FLAG_MMX2 | AV_CPU_FLAG_SSE
> @@ -334,6 +336,7 @@ static const struct {
> { AV_CPU_FLAG_AVX2, "avx2" },
> { AV_CPU_FLAG_BMI1, "bmi1" },
> { AV_CPU_FLAG_BMI2, "bmi2" },
> + { AV_CPU_FLAG_AESNI, "aesni" },
> #endif
> { 0 }
> };
> diff --git a/libavutil/cpu.h b/libavutil/cpu.h
> index 9403eca..038afd0 100644
> --- a/libavutil/cpu.h
> +++ b/libavutil/cpu.h
> @@ -51,6 +51,7 @@
> #define AV_CPU_FLAG_FMA3 0x10000 ///< Haswell FMA3 functions
> #define AV_CPU_FLAG_BMI1 0x20000 ///< Bit Manipulation Instruction
> Set 1
> #define AV_CPU_FLAG_BMI2 0x40000 ///< Bit Manipulation Instruction
> Set 2
> +#define AV_CPU_FLAG_AESNI 0x80000 ///< Advanced Encryption Standard
>
> #define AV_CPU_FLAG_ALTIVEC 0x0001 ///< standard
> #define AV_CPU_FLAG_VSX 0x0002 ///< ISA 2.06
> diff --git a/libavutil/x86/cpu.c b/libavutil/x86/cpu.c
> index 7a5d4e6..f57d72d 100644
> --- a/libavutil/x86/cpu.c
> +++ b/libavutil/x86/cpu.c
> @@ -126,6 +126,8 @@ int ff_get_cpu_flags_x86(void)
> rval |= AV_CPU_FLAG_SSE4;
> if (ecx & 0x00100000 )
> rval |= AV_CPU_FLAG_SSE42;
> + if (ecx & 0x01000000 )
> + rval |= AV_CPU_FLAG_AESNI;
> #if HAVE_AVX
> /* Check OXSAVE and AVX bits */
> if ((ecx & 0x18000000) == 0x18000000) {
> diff --git a/libavutil/x86/cpu.h b/libavutil/x86/cpu.h
> index 1cea419..dc102c6 100644
> --- a/libavutil/x86/cpu.h
> +++ b/libavutil/x86/cpu.h
> @@ -47,6 +47,7 @@
> #define X86_FMA3(flags) CPUEXT(flags, FMA3)
> #define X86_FMA4(flags) CPUEXT(flags, FMA4)
> #define X86_AVX2(flags) CPUEXT(flags, AVX2)
> +#define X86_AESNI(flags) CPUEXT(flags, AESNI)
>
> #define EXTERNAL_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AMD3DNOW)
> #define EXTERNAL_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _EXTERNAL,
> AMD3DNOWEXT)
> @@ -69,6 +70,7 @@
> #define EXTERNAL_FMA3(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA3)
> #define EXTERNAL_FMA4(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, FMA4)
> #define EXTERNAL_AVX2(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AVX2)
> +#define EXTERNAL_AESNI(flags) CPUEXT_SUFFIX(flags, _EXTERNAL, AESNI)
>
> #define INLINE_AMD3DNOW(flags) CPUEXT_SUFFIX(flags, _INLINE, AMD3DNOW)
> #define INLINE_AMD3DNOWEXT(flags) CPUEXT_SUFFIX(flags, _INLINE,
> AMD3DNOWEXT)
> @@ -91,6 +93,7 @@
> #define INLINE_FMA3(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA3)
> #define INLINE_FMA4(flags) CPUEXT_SUFFIX(flags, _INLINE, FMA4)
> #define INLINE_AVX2(flags) CPUEXT_SUFFIX(flags, _INLINE, AVX2)
> +#define INLINE_AESNI(flags) CPUEXT_SUFFIX(flags, _INLINE, AESNI)
>
> void ff_cpu_cpuid(int index, int *eax, int *ebx, int *ecx, int *edx);
> void ff_cpu_xgetbv(int op, int *eax, int *edx);
> diff --git a/libavutil/x86/x86inc.asm b/libavutil/x86/x86inc.asm
> index afcd6b8..5082a2b 100644
> --- a/libavutil/x86/x86inc.asm
> +++ b/libavutil/x86/x86inc.asm
> @@ -772,6 +772,7 @@ BRANCH_INSTR jz, je, jnz, jne, jl, jle, jnl, jnle, jg,
> jge, jng, jnge, ja, jae,
> %assign cpuflags_atom (1<<21)
> %assign cpuflags_bmi1 (1<<22)|cpuflags_lzcnt
> %assign cpuflags_bmi2 (1<<23)|cpuflags_bmi1
> +%assign cpuflags_aesni (1<<24)|cpuflags_sse2
(1<<24)|cpuflags_sse42
And make cpuflags_avx include cpuflags_aesni.
You could also rearrange the values so it looks nicer and in order.
>
> ; Returns a boolean value expressing whether or not the specified cpuflag is
> enabled.
> %define cpuflag(x) (((((cpuflags & (cpuflags_ %+ x)) ^ (cpuflags_ %+ x))
> - 1) >> 31) & 1)
> diff --git a/tests/checkasm/checkasm.c b/tests/checkasm/checkasm.c
> index bba2dbc..2e3d393 100644
> --- a/tests/checkasm/checkasm.c
> +++ b/tests/checkasm/checkasm.c
> @@ -117,6 +117,7 @@ static const struct {
> { "SSSE3", "ssse3", AV_CPU_FLAG_SSSE3|AV_CPU_FLAG_ATOM },
> { "SSE4.1", "sse4", AV_CPU_FLAG_SSE4 },
> { "SSE4.2", "sse42", AV_CPU_FLAG_SSE42 },
> + { "AESNI", "aesni", AV_CPU_FLAG_AESNI },
> { "AVX", "avx", AV_CPU_FLAG_AVX },
> { "XOP", "xop", AV_CPU_FLAG_XOP },
> { "FMA3", "fma3", AV_CPU_FLAG_FMA3 },
>
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