PR #22636 opened by mkver URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/22636 Patch URL: https://code.ffmpeg.org/FFmpeg/FFmpeg/pulls/22636.patch
>From d3a2dc7ab0c51414876f38a2335effba9b26a684 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 04:32:21 +0100 Subject: [PATCH 01/15] avcodec/x86/vvc/of: Remove redundant instructions m8 here (corresponding to a mix of sgx2 and sgy2 in derive_bdof_vx_vy in the C version) is always nonnegative, so the psignd boils down to a check for m8 being zero. But if an entry of m8 is zero, then the corresponding entry of m9 is automatically zero, too, as sgx2 being zero implies sgxdi being zero and sgy2 implies sgxgy, sgydi being zero.* So just remove these redundant instructions. *: In other words, one could remove the sgx2,sgy2>0 checks from the end of derive_bdof_vx_vy() as long as av_log2(0) is defined. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 5 +---- 1 file changed, 1 insertion(+), 4 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index eca52f244f..a3162a9ff5 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -289,14 +289,12 @@ INIT_YMM avx2 LOG2 10, 8 ; 4 (log2(sgx2), log2(sgy2)) ; Promote to dword since vpsrlvw is AVX-512 only - pmovsxwd m8, xm8 pmovsxwd m9, xm9 pmovsxwd m10, xm10 pslld m9, 2 ; 4 (log2(sgx2) << 2, log2(sgy2) << 2) - psignd m11, m9, m8 - vpsravd m11, m11, m10 + vpsravd m11, m9, m10 CLIPD m11, [pd_m15], [pd_15] ; 4 (vx, junk) pshuflw m%1, m11, q0000 @@ -309,7 +307,6 @@ INIT_YMM avx2 psrad m%2, 1 psubd m9, m%2 ; 4 (junk, (sgydi << 2) - (vx * sgxgy >> 1)) - psignd m9, m8 vpsravd m%2, m9, m10 CLIPD m%2, [pd_m15], [pd_15] ; 4 (junk, vy) -- 2.52.0 >From dc0a928962304d134177340ff52ca7c5fa704e56 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 05:30:37 +0100 Subject: [PATCH 02/15] avcodec/x86/vvc/of: Avoid scalar log2 Instead convert the integers to floats and inspect the exponent. Old benchmarks: apply_bdof_8_8x16_c: 3295.2 ( 1.00x) apply_bdof_8_8x16_avx2: 312.7 (10.54x) apply_bdof_8_16x8_c: 3269.1 ( 1.00x) apply_bdof_8_16x8_avx2: 203.6 (16.05x) apply_bdof_8_16x16_c: 6584.8 ( 1.00x) apply_bdof_8_16x16_avx2: 413.6 (15.92x) apply_bdof_10_8x16_c: 3313.9 ( 1.00x) apply_bdof_10_8x16_avx2: 321.5 (10.31x) apply_bdof_10_16x8_c: 3306.5 ( 1.00x) apply_bdof_10_16x8_avx2: 200.4 (16.50x) apply_bdof_10_16x16_c: 6659.7 ( 1.00x) apply_bdof_10_16x16_avx2: 402.4 (16.55x) apply_bdof_12_8x16_c: 3305.7 ( 1.00x) apply_bdof_12_8x16_avx2: 321.8 (10.27x) apply_bdof_12_16x8_c: 3258.1 ( 1.00x) apply_bdof_12_16x8_avx2: 198.6 (16.41x) apply_bdof_12_16x16_c: 6600.2 ( 1.00x) apply_bdof_12_16x16_avx2: 392.6 (16.81x) New benchmarks: apply_bdof_8_8x16_c: 3269.9 ( 1.00x) apply_bdof_8_8x16_avx2: 266.5 (12.27x) apply_bdof_8_16x8_c: 3252.9 ( 1.00x) apply_bdof_8_16x8_avx2: 182.6 (17.81x) apply_bdof_8_16x16_c: 6596.7 ( 1.00x) apply_bdof_8_16x16_avx2: 362.7 (18.19x) apply_bdof_10_8x16_c: 3351.3 ( 1.00x) apply_bdof_10_8x16_avx2: 269.0 (12.46x) apply_bdof_10_16x8_c: 3329.1 ( 1.00x) apply_bdof_10_16x8_avx2: 174.5 (19.08x) apply_bdof_10_16x16_c: 6654.3 ( 1.00x) apply_bdof_10_16x16_avx2: 357.8 (18.60x) apply_bdof_12_8x16_c: 3274.1 ( 1.00x) apply_bdof_12_8x16_avx2: 276.0 (11.86x) apply_bdof_12_16x8_c: 3263.5 ( 1.00x) apply_bdof_12_16x8_avx2: 176.8 (18.46x) apply_bdof_12_16x16_c: 6576.4 ( 1.00x) apply_bdof_12_16x16_avx2: 357.8 (18.38x) Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 42 ++++++++++----------------------------- 1 file changed, 11 insertions(+), 31 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index a3162a9ff5..9cfee1ad1b 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -246,35 +246,15 @@ INIT_YMM avx2 %endmacro -%macro LOG2 5 ; log_sum, src, cmp, shift, tmp - pcmpgtw %5, %2, %3 - pandd %5, %4 - paddw %1, %5 - - psrlw %2, %5 - psrlw %4, 1 - psrlw %3, %4 -%endmacro - -%macro LOG2 3 ; dst, src, offset - pextrw tmp0d, xm%2, %3 - bsr tmp0d, tmp0d -%if %3 != 0 - pinsrw xm%1, tmp0d, %3 -%else - movd xm%1, tmp0d -%endif -%endmacro - -%macro LOG2 2 ; dst, src - LOG2 %1, %2, 0 - LOG2 %1, %2, 1 - LOG2 %1, %2, 2 - LOG2 %1, %2, 3 - LOG2 %1, %2, 4 - LOG2 %1, %2, 5 - LOG2 %1, %2, 6 - LOG2 %1, %2, 7 +%macro LOG2 3 ; dst, src, tmp + cvtdq2ps %1, %2 + ; The exponent contains log2 biased by 127 unless the value is zero. + ; dst is only used as shift count where the value to be shifted is + ; always zero if src is zero, so avoid using saturated subtraction. + pcmpeqd %3, %3 + psrld %3, 25 ; pd_127 + psrld %1, 23 ; floating point exponent + psubd %1, %3 %endmacro ; %1: 4 (sgx2, sgy2, sgxdi, gydi) @@ -286,11 +266,11 @@ INIT_YMM avx2 punpcklqdq m8, m%1, m7 ; 4 (sgx2, sgy2) punpckhqdq m9, m%1, m7 ; 4 (sgxdi, sgydi) - LOG2 10, 8 ; 4 (log2(sgx2), log2(sgy2)) ; Promote to dword since vpsrlvw is AVX-512 only + pmovzxwd m8, xm8 pmovsxwd m9, xm9 - pmovsxwd m10, xm10 + LOG2 m10, m8, m7 ; 4 (log2(sgx2), log2(sgy2)) pslld m9, 2 ; 4 (log2(sgx2) << 2, log2(sgy2) << 2) -- 2.52.0 >From a1b57b9fd3bc02dc4f6f98989f2e4cf3aa7d957c Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 05:50:57 +0100 Subject: [PATCH 03/15] avcodec/x86/vvc/of: Correct comment Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index 9cfee1ad1b..67ea696f2e 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -272,13 +272,13 @@ INIT_YMM avx2 pmovsxwd m9, xm9 LOG2 m10, m8, m7 ; 4 (log2(sgx2), log2(sgy2)) - pslld m9, 2 ; 4 (log2(sgx2) << 2, log2(sgy2) << 2) + pslld m9, 2 ; 4 (sgxdi, sgydi) vpsravd m11, m9, m10 CLIPD m11, [pd_m15], [pd_15] ; 4 (vx, junk) pshuflw m%1, m11, q0000 - pshufhw m%1, m%1, q0000 ; 4 (2junk, 2vx) + pshufhw m%1, m%1, q0000 ; 4 (4vx) psllq m6, m%2, 32 paddw m%2, m6 -- 2.52.0 >From cd659948ddcda227f0924d9ed835aae166085da7 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 10:39:50 +0100 Subject: [PATCH 04/15] avcodec/x86/vvc/of: Use xmm registers where sufficient Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index 67ea696f2e..813e0054d0 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -264,8 +264,8 @@ INIT_YMM avx2 punpckldq m%1, m6 vextracti128 xm7, m%1, 1 - punpcklqdq m8, m%1, m7 ; 4 (sgx2, sgy2) - punpckhqdq m9, m%1, m7 ; 4 (sgxdi, sgydi) + punpcklqdq xm8, xm%1, xm7 ; 4 (sgx2, sgy2) + punpckhqdq xm9, xm%1, xm7 ; 4 (sgxdi, sgydi) ; Promote to dword since vpsrlvw is AVX-512 only pmovzxwd m8, xm8 -- 2.52.0 >From 100cc61cb9833ba4ff5591d617ab898403ce5ae9 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 26 Mar 2026 17:27:16 +0100 Subject: [PATCH 05/15] avcodec/x86/vvc/of: Avoid punpckldq Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index 813e0054d0..f733886888 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -260,8 +260,7 @@ INIT_YMM avx2 ; %1: 4 (sgx2, sgy2, sgxdi, gydi) ; %2: 4 (4sgxgy) %macro BDOF_VX_VY 2 ; - pshufd m6, m%1, q0032 - punpckldq m%1, m6 + pshufd m%1, m%1, q3120 vextracti128 xm7, m%1, 1 punpcklqdq xm8, xm%1, xm7 ; 4 (sgx2, sgy2) -- 2.52.0 >From a0aa9a1bcedbba941c1f3e72a88b95fe09e341d6 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 26 Mar 2026 17:59:53 +0100 Subject: [PATCH 06/15] avcodec/x86/vvc/of: Deduplicate common code The height 8 and 16 cases differ from the second BDOF mini block onwards, but even the beginning of said mini block is the same and can therefore be deduplicated. This saves 821B here. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index f733886888..d40ed73b3b 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -305,8 +305,10 @@ INIT_YMM avx2 BDOF_PROF_GRAD 0, 0 %endif +%if (%1) != 1 BDOF_PROF_GRAD %1 * 4 + 1, 0 BDOF_PROF_GRAD %1 * 4 + 2, 0 +%endif %if (%2) BDOF_PROF_GRAD %1 * 4 + 3, %2 @@ -361,6 +363,9 @@ PROLOGUE 6, 9, 16, BDOF_STACK_SIZE*32, dst, ds, src0, src1, w, h, pixel_max, ds3 BDOF_MINI_BLOCKS 0, 0 + BDOF_PROF_GRAD 1 * 4 + 1, 0 + BDOF_PROF_GRAD 1 * 4 + 2, 0 + cmp hd, 16 je .h16 BDOF_MINI_BLOCKS 1, 1 -- 2.52.0 >From d00b5233559de51716f2c59899e4c8afe5959b68 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 26 Mar 2026 22:41:12 +0100 Subject: [PATCH 07/15] avcodec/x86/vvc/of: Don't add to zero Instead rewrite the code to use assignment. Saves zeroing and additions. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 32 +++++++++++++++++++++++++------- 1 file changed, 25 insertions(+), 7 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index d40ed73b3b..29d3ca0798 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -129,18 +129,26 @@ INIT_YMM avx2 SAVE [dstq + ds3q], 6, %4 %endmacro -%macro SUM_MIN_BLOCK_W16 4 ; src/dst, shuffle, perm, tmp +%macro SUM_MIN_BLOCK_W16 4-5 ; src/dst, shuffle, perm, tmp, [dst] pshufb %4, %1, %2 vpermd %4, %3, %4 +%if %0 == 4 paddw %1, %4 +%else + paddw %5, %1, %4 +%endif %endmacro -%macro SUM_MIN_BLOCK_W8 3 ; src/dst, shuffle, tmp +%macro SUM_MIN_BLOCK_W8 3-4 ; src/dst, shuffle, tmp, [dst] pshufb %3, %1, %2 +%if %0 == 3 paddw %1, %3 +%else + paddw %4, %1, %3 +%endif %endmacro -%macro BDOF_PROF_GRAD 2 ; line_no, last_line +%macro BDOF_PROF_GRAD 2-3 0 ; line_no, last_line, assign (instead of add) to dst regs %assign i0 (%1 + 0) % 3 %assign j0 (%1 + 1) % 3 %assign k0 (%1 + 2) % 3 @@ -201,7 +209,11 @@ INIT_YMM avx2 SUM_MIN_BLOCK_W8 m7, t0, m11 SUM_MIN_BLOCK_W8 m8, t0, m11 SUM_MIN_BLOCK_W8 m9, t0, m11 +%if (%3) + SUM_MIN_BLOCK_W8 m10, t0, m11, m13 +%else SUM_MIN_BLOCK_W8 m10, t0, m11 +%endif jmp %%wend %%w16: @@ -210,7 +222,11 @@ INIT_YMM avx2 SUM_MIN_BLOCK_W16 m7, t0, t1, m11 SUM_MIN_BLOCK_W16 m8, t0, t1, m11 SUM_MIN_BLOCK_W16 m9, t0, t1, m11 +%if (%3) + SUM_MIN_BLOCK_W16 m10, t0, t1, m11, m13 +%else SUM_MIN_BLOCK_W16 m10, t0, t1, m11 +%endif %%wend: vpblendd m11, m8, m7, 10101010b @@ -227,13 +243,17 @@ INIT_YMM avx2 vpblendw m6, m8, m6, 01010101b pshuflw m6, m6, q2301 pshufhw m6, m6, q2301 +%if (%3) + paddw m12, m6, m11 ; 4 x (4sgx2, 4sgy2, 4sgxdi, 4sgydi) +%else paddw m8, m6, m11 ; 4 x (4sgx2, 4sgy2, 4sgxdi, 4sgydi) +%endif %if (%1) == 0 ; pad for top and directly output to m12, m13 paddw m12, m8, m8 paddw m13, m10, m10 -%else +%elifn (%3) %if (%2) ; pad for bottom paddw m8, m8 @@ -323,9 +343,7 @@ INIT_YMM avx2 mova m14, m12 mova m15, m13 - pxor m12, m12 - pxor m13, m13 - BDOF_PROF_GRAD %1 * 4 + 3, 0 + BDOF_PROF_GRAD %1 * 4 + 3, 0, 1 BDOF_PROF_GRAD %1 * 4 + 4, 0 paddw m14, m12 paddw m15, m13 -- 2.52.0 >From e7d63644208fd953bfdc3083689584b928edda52 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Fri, 27 Mar 2026 08:48:42 +0100 Subject: [PATCH 08/15] avcodec/x86/vvc/of: Don't use ymm regs where xmm are sufficient Also use a register in the 0-7 range as clobber reg, as this reduces codesize (by 51B). Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/of.asm | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/libavcodec/x86/vvc/of.asm b/libavcodec/x86/vvc/of.asm index 29d3ca0798..92e8b010a2 100644 --- a/libavcodec/x86/vvc/of.asm +++ b/libavcodec/x86/vvc/of.asm @@ -140,11 +140,11 @@ INIT_YMM avx2 %endmacro %macro SUM_MIN_BLOCK_W8 3-4 ; src/dst, shuffle, tmp, [dst] - pshufb %3, %1, %2 + pshufb xm%3, xm%1, xm%2 %if %0 == 3 - paddw %1, %3 + paddw xm%1, xm%3 %else - paddw %4, %1, %3 + paddw xm%4, xm%1, xm%3 %endif %endmacro @@ -205,14 +205,14 @@ INIT_YMM avx2 cmp wd, 16 je %%w16 - SUM_MIN_BLOCK_W8 m6, t0, m11 - SUM_MIN_BLOCK_W8 m7, t0, m11 - SUM_MIN_BLOCK_W8 m8, t0, m11 - SUM_MIN_BLOCK_W8 m9, t0, m11 + SUM_MIN_BLOCK_W8 6, i0, i1 + SUM_MIN_BLOCK_W8 7, i0, i1 + SUM_MIN_BLOCK_W8 8, i0, i1 + SUM_MIN_BLOCK_W8 9, i0, i1 %if (%3) - SUM_MIN_BLOCK_W8 m10, t0, m11, m13 + SUM_MIN_BLOCK_W8 10, i0, i1, 13 %else - SUM_MIN_BLOCK_W8 m10, t0, m11 + SUM_MIN_BLOCK_W8 10, i0, i1 %endif jmp %%wend -- 2.52.0 >From 03bb0fab1b0bfd53e49ac15da39481fda61ac6a0 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 11:12:00 +0100 Subject: [PATCH 09/15] avcodec/x86/vvc/alf: Avoid modifying nonvolatile registers Avoids push+pop on Win64; in any case, using registers m0-m7 more often saves codesize. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 42 +++++++++++++++++++------------------- 1 file changed, 21 insertions(+), 21 deletions(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index 22205c3ca2..1ee1f483de 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -542,7 +542,7 @@ INIT_YMM cpuname ; ptrdiff_t src_stride, intptr_t width, intptr_t height, intptr_t vb_pos); ; ****************************** %macro ALF_CLASSIFY_GRAD 1 -cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 16, gradient_sum, src, src_stride, width, height, vb_pos, \ +cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, width, height, vb_pos, \ x, y, s0, s1, s2, s3, vb_pos_below, src_stride3 lea src_stride3q, [src_strideq * 2 + src_strideq] @@ -560,7 +560,7 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 16, gradient_sum, src, src_stride, w .loop_h: xor xd, xd - pxor m15, m15 ; prev + pxor xm11, xm11 ; prev .loop_w: lea s0q, [srcq + xq * ps] lea s1q, [s0q + src_strideq] @@ -585,44 +585,44 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 16, gradient_sum, src, src_stride, w pblendw m8, m0, m1, 0xaa ; nw pblendw m9, m0, m5, 0x55 ; n - pblendw m10, m4, m5, 0xaa ; ne - pblendw m11, m1, m2, 0xaa ; w - pblendw m12, m5, m6, 0xaa ; e - pblendw m13, m2, m3, 0xaa ; sw - pblendw m14, m2, m7, 0x55 ; s + pblendw m4, m4, m5, 0xaa ; ne + pblendw m10, m1, m2, 0xaa ; w + pblendw m5, m5, m6, 0xaa ; e + pblendw m3, m2, m3, 0xaa ; sw + pblendw m2, m2, m7, 0x55 ; s pblendw m0, m1, m6, 0x55 paddw m0, m0 ; c pshufb m1, m0, [CLASSIFY_SHUFFE] ; d - paddw m9, m14 ; n + s + paddw m9, m2 ; n + s psubw m9, m0 ; (n + s) - c pabsw m9, m9 ; ver - paddw m11, m12 ; w + e - psubw m11, m1 ; (w + e) - d - pabsw m11, m11 ; hor + paddw m5, m10 ; w + e + psubw m5, m1 ; (w + e) - d + pabsw m5, m5 ; hor - pblendw m14, m6, m7, 0xaa ; se - paddw m8, m14 ; nw + se + pblendw m6, m6, m7, 0xaa ; se + paddw m8, m6 ; nw + se psubw m8, m1 ; (nw + se) - d pabsw m8, m8 ; di0 - paddw m10, m13 ; ne + sw - psubw m10, m1 ; (nw + se) - d - pabsw m10, m10 ; di1 + paddw m4, m3 ; ne + sw + psubw m4, m1 ; (nw + se) - d + pabsw m4, m4 ; di1 - phaddw m9, m11 ; vh, each word represent 2x2 pixels - phaddw m8, m10 ; di, each word represent 2x2 pixels + phaddw m9, m5 ; vh, each word represent 2x2 pixels + phaddw m8, m4 ; di, each word represent 2x2 pixels phaddw m0, m9, m8 ; all = each word represent 4x2 pixels, order is v_h_d0_d1 x 4 - vinserti128 m15, m15, xm0, 1 - pblendw m1, m0, m15, 0xaa ; t + vinserti128 m11, m11, xm0, 1 + pblendw m1, m0, m11, 0xaa ; t phaddw m1, m0 ; each word represent 8x2 pixels, adjacent word share 4x2 pixels - vextracti128 xm15, m0, 1 ; prev + vextracti128 xm11, m0, 1 ; prev movu [gradient_sumq], m1 -- 2.52.0 >From ce5e25730208703cd0c4b77f721f7e4855359598 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 11:44:16 +0100 Subject: [PATCH 10/15] avcodec/x86/vvc/alf: Use correct shift amount Fixes a bug in 94f9ad8061371d1ac946beed42db49d5d2fe2499. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index 1ee1f483de..d8b3bf1173 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -794,7 +794,7 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w %if ps != 1 vpsrlvd m0, m0, m5 %else - psrld m0, 8 + psrld m0, 7 %endif pminsd m0, [dd15] movu m6, [ARG_VAR_SHUFFE] -- 2.52.0 >From 4cfa06b432bf53e4333821a55284aa511bc184bc Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 13:28:40 +0100 Subject: [PATCH 11/15] avcodec/x86/vvc/alf: Avoid modifying nonvolatile registers Avoids push+pop on Win64; in any case, using registers m0-m7 more often saves codesize. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 132 ++++++++++++++++++------------------- 1 file changed, 66 insertions(+), 66 deletions(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index d8b3bf1173..b0f66bc724 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -681,62 +681,62 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w movu m1, [gradq + sum_strideq] movu m2, [gradq + 2 * sum_strideq] - movd xm13, yd - movd xm12, vb_posd - pcmpeqb xm11, xm11 - pcmpeqd xm13, xm12 ; y == vb_pos - pxor xm13, xm11 ; y != vb_pos - vpbroadcastd m13, xm13 + movd xm8, yd + movd xm4, vb_posd + pcmpeqb xm5, xm5 + pcmpeqd xm8, xm4 ; y == vb_pos + pxor xm8, xm5 ; y != vb_pos + vpbroadcastd m8, xm8 - vpbroadcastd m14, [dw3] - paddd m14, m13 ; ac = (y != vb_pos) ? 2 : 3 + vpbroadcastd m9, [dw3] + paddd m9, m8 ; ac = (y != vb_pos) ? 2 : 3 - pblendvb m3, m15, [gradq + sum_stride3q], m13 + pblendvb m3, m10, [gradq + sum_stride3q], m8 ; extent to dword to avoid overflow - punpcklwd m4, m0, m15 - punpckhwd m5, m0, m15 - punpcklwd m6, m1, m15 - punpckhwd m7, m1, m15 - punpcklwd m8, m2, m15 - punpckhwd m9, m2, m15 - punpcklwd m10, m3, m15 - punpckhwd m11, m3, m15 + punpckhwd m4, m0, m10 + punpcklwd m0, m0, m10 + punpckhwd m5, m1, m10 + punpcklwd m1, m1, m10 + punpckhwd m6, m2, m10 + punpcklwd m2, m2, m10 + punpckhwd m7, m3, m10 + punpcklwd m3, m3, m10 - paddd m0, m4, m6 - paddd m1, m5, m7 - paddd m2, m8, m10 - paddd m3, m9, m11 + paddd m4, m5 + paddd m0, m1 + paddd m6, m7 + paddd m2, m3 ; sum of the first row - paddd m0, m2 ; low - paddd m1, m3 ; high + paddd m0, m0, m2 ; low + paddd m1, m4, m6 ; high lea gradq, [gradq + 2 * sum_strideq] - pblendvb m10, m15, [gradq], m13 + pblendvb m2, m10, [gradq], m8 - movu m11, [gradq + sum_strideq] - movu m12, [gradq + 2 * sum_strideq] - movu m13, [gradq + sum_stride3q] + movu m3, [gradq + sum_strideq] + movu m4, [gradq + 2 * sum_strideq] + movu m5, [gradq + sum_stride3q] - punpcklwd m4, m10, m15 - punpckhwd m5, m10, m15 - punpcklwd m6, m11, m15 - punpckhwd m7, m11, m15 - punpcklwd m8, m12, m15 - punpckhwd m9, m12, m15 - punpcklwd m10, m13, m15 - punpckhwd m11, m13, m15 + punpckhwd m6, m2, m10 + punpcklwd m2, m2, m10 + punpckhwd m7, m3, m10 + punpcklwd m3, m3, m10 + punpckhwd m8, m4, m10 + punpcklwd m4, m4, m10 + paddd m6, m7 + punpckhwd m7, m5, m10 + punpcklwd m5, m5, m10 - paddd m2, m4, m6 - paddd m3, m5, m7 - paddd m4, m8, m10 - paddd m5, m9, m11 + paddd m2, m3 + paddd m8, m7 + paddd m4, m5 ; sum of the second row - paddd m2, m4 ; low - paddd m3, m5 ; high + paddd m2, m2, m4 ; low + paddd m3, m8, m6 ; high punpckldq m4, m0, m2 punpckhdq m5, m0, m2 @@ -758,31 +758,31 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w pcmpgtd m7, m2, m3 ; dir_d - 1 pmaxsd m8, m2, m3 ; d1 - pminsd m9, m2, m3 ; d0 + pminsd m3, m2, m3 ; d0 ; *transpose_idx = dir_d * 2 + dir_hv; - vpbroadcastd m10, [dw3] - paddd m11, m7, m7 - paddd m11, m4 - paddd m10, m11 - SAVE_CLASSIFY_PARAM transpose_idx, 10 + vpbroadcastd m1, [dw3] + paddd m7, m7 + paddd m7, m4 + paddd m7, m1 + SAVE_CLASSIFY_PARAM transpose_idx, 7 - psrlq m10, m8, 32 - psrlq m11, m6, 32 - pmuldq m12, m10, m11 ; d1 * hv0 high - psrlq m1, m9, 32 - psrlq m2, m5, 32 - pmuldq m3, m1, m2 ; d0 * hv1 high - pcmpgtq m10, m12, m3 ; dir1 - 1 high + psrlq m1, m8, 32 + psrlq m2, m6, 32 + pmuldq m4, m1, m2 ; d1 * hv0 high + psrlq m1, m3, 32 + psrlq m2, m5, 32 + pmuldq m7, m1, m2 ; d0 * hv1 high + pcmpgtq m7, m4, m7 ; dir1 - 1 high pmuldq m1, m8, m6 ; d1 * hv0 low - pmuldq m2, m9, m5 ; d0 * hv1 low + pmuldq m2, m3, m5 ; d0 * hv1 low pcmpgtq m1, m2 ; dir1 - 1 low - vpblendd m1, m1, m10, 0xaa ; dir1 - 1 + vpblendd m1, m1, m7, 0xaa ; dir1 - 1 pblendvb m2, m5, m8, m1 ; hvd1 - pblendvb m3, m6, m9, m1 ; hvd0 + pblendvb m3, m6, m3, m1 ; hvd0 %if ps != 1 ; high bit depth movd xm5, bit_depthd @@ -790,7 +790,7 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w %endif ;*class_idx = arg_var[av_clip_uintp2(sum_hv * ac >> (BIT_DEPTH - 1), 4)]; - pmulld m0, m14 ; sum_hv * ac + pmulld m0, m9 ; sum_hv * ac %if ps != 1 vpsrlvd m0, m0, m5 %else @@ -800,7 +800,7 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w movu m6, [ARG_VAR_SHUFFE] pshufb m6, m0 ; class_idx - vpbroadcastd m10, [dw5] + vpbroadcastd m0, [dw5] ; if (hvd1 * 2 > 9 * hvd0) ; *class_idx += ((dir1 << 1) + 2) * 5; @@ -808,14 +808,14 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w ; *class_idx += ((dir1 << 1) + 1) * 5; paddd m7, m3, m3 pcmpgtd m7, m2, m7 ; hvd1 > 2 * hvd0 - pand m7, m10 + pand m7, m0 paddd m6, m7 ; class_idx paddd m8, m2, m2 - pslld m9, m3, 3 - paddd m9, m3 - pcmpgtd m8, m9 ; hvd1 * 2 > 9 * hvd0 - pand m8, m10 + pslld m2, m3, 3 + paddd m2, m3 + pcmpgtd m8, m2 ; hvd1 * 2 > 9 * hvd0 + pand m8, m0 paddd m6, m8 ; class_idx pandn m1, m7 @@ -844,7 +844,7 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w %macro ALF_CLASSIFY 1 %define ps (%1 / 8) ALF_CLASSIFY_GRAD %1 -cglobal vvc_alf_classify_%1bpc, 7, 15, 16, class_idx, transpose_idx, gradient_sum, width, height, vb_pos, bit_depth, \ +cglobal vvc_alf_classify_%1bpc, 7, 15, 11, class_idx, transpose_idx, gradient_sum, width, height, vb_pos, bit_depth, \ x, y, grad, sum_stride, sum_stride3, temp, w %if ps != 1 @@ -863,7 +863,7 @@ cglobal vvc_alf_classify_%1bpc, 7, 15, 16, class_idx, transpose_idx, gradient_su xor yd, yd and vb_posd, ~7 ; floor align to 8 - pxor m15, m15 + pxor xm10, xm10 .loop_sum_h: xor xd, xd -- 2.52.0 >From c0a55b64e14f65db5f1518961961e7c34ffd37b6 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 13:38:00 +0100 Subject: [PATCH 12/15] avcodec/x86/vvc/alf: Avoid reload Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index b0f66bc724..901b7c764e 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -699,22 +699,22 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w punpckhwd m5, m1, m10 punpcklwd m1, m1, m10 punpckhwd m6, m2, m10 - punpcklwd m2, m2, m10 + paddd m4, m5 + punpcklwd m5, m2, m10 punpckhwd m7, m3, m10 punpcklwd m3, m3, m10 - paddd m4, m5 paddd m0, m1 paddd m6, m7 - paddd m2, m3 + paddd m5, m3 ; sum of the first row - paddd m0, m0, m2 ; low + paddd m0, m0, m5 ; low paddd m1, m4, m6 ; high lea gradq, [gradq + 2 * sum_strideq] - pblendvb m2, m10, [gradq], m8 + pblendvb m2, m10, m2, m8 movu m3, [gradq + sum_strideq] movu m4, [gradq + 2 * sum_strideq] -- 2.52.0 >From 25b92f629bf97519031f102f5eb77eb3b8e8985d Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 14:10:41 +0100 Subject: [PATCH 13/15] avcodec/x86/vvc/alf: Don't push+pop unused register This function only uses 14 GPRs. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index 901b7c764e..c52660d222 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -844,7 +844,7 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w %macro ALF_CLASSIFY 1 %define ps (%1 / 8) ALF_CLASSIFY_GRAD %1 -cglobal vvc_alf_classify_%1bpc, 7, 15, 11, class_idx, transpose_idx, gradient_sum, width, height, vb_pos, bit_depth, \ +cglobal vvc_alf_classify_%1bpc, 7, 14, 11, class_idx, transpose_idx, gradient_sum, width, height, vb_pos, bit_depth, \ x, y, grad, sum_stride, sum_stride3, temp, w %if ps != 1 -- 2.52.0 >From 6f3cb480d3953c7127ddb2ab0adf33482082da66 Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 14:33:55 +0100 Subject: [PATCH 14/15] avcodec/x86/vvc/alf: Hoist creating shift register out of loop Possible now that this function no longer uses unnecessarily many registers. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 11 ++++------- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index c52660d222..4dc396afce 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -784,15 +784,10 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w pblendvb m2, m5, m8, m1 ; hvd1 pblendvb m3, m6, m3, m1 ; hvd0 -%if ps != 1 ; high bit depth - movd xm5, bit_depthd - vpbroadcastd m5, xm5 -%endif - ;*class_idx = arg_var[av_clip_uintp2(sum_hv * ac >> (BIT_DEPTH - 1), 4)]; pmulld m0, m9 ; sum_hv * ac %if ps != 1 - vpsrlvd m0, m0, m5 + vpsrlvd m0, m0, m11 %else psrld m0, 7 %endif @@ -844,11 +839,13 @@ cglobal vvc_alf_classify_grad_%1bpc, 6, 14, 12, gradient_sum, src, src_stride, w %macro ALF_CLASSIFY 1 %define ps (%1 / 8) ALF_CLASSIFY_GRAD %1 -cglobal vvc_alf_classify_%1bpc, 7, 14, 11, class_idx, transpose_idx, gradient_sum, width, height, vb_pos, bit_depth, \ +cglobal vvc_alf_classify_%1bpc, 7, 14, 11+(ps!=1), class_idx, transpose_idx, gradient_sum, width, height, vb_pos, bit_depth, \ x, y, grad, sum_stride, sum_stride3, temp, w %if ps != 1 sub bit_depthd, 1 + movd xm11, bit_depthd + vpbroadcastd m11, xm11 %endif ; now we can use gradient to get class idx and transpose idx -- 2.52.0 >From 6ec2221fc6646d9a6b4a269f31235111d9c22bef Mon Sep 17 00:00:00 2001 From: Andreas Rheinhardt <[email protected]> Date: Thu, 19 Mar 2026 14:38:57 +0100 Subject: [PATCH 15/15] avcodec/x86/vvc/alf: Avoid zeroing unnecessarily In case of >8bpp, there is already a zero register available (for clipping); in case of Unix64, one can simply use an unused register. Doing so reduces codesize. Signed-off-by: Andreas Rheinhardt <[email protected]> --- libavcodec/x86/vvc/alf.asm | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/libavcodec/x86/vvc/alf.asm b/libavcodec/x86/vvc/alf.asm index 4dc396afce..04da800ad8 100644 --- a/libavcodec/x86/vvc/alf.asm +++ b/libavcodec/x86/vvc/alf.asm @@ -136,8 +136,12 @@ SECTION .text %define clips m %+ k pshufb m12, clips, [param_shuffe_ %+ i] ;clip +%if ps != 1 || UNIX64 + psubw m11, m14, m12 ;-clip +%else pxor m11, m11 psubw m11, m12 ;-clip +%endif psubw m9, m2 CLIPW m9, m11, m12 @@ -477,9 +481,9 @@ cglobal vvc_alf_filter_%2_%1 jmp vvc_alf_filter_%2_%3_prologue %else vvc_alf_filter_%2_%1_prologue: - PROLOGUE 9, 14+LUMA, 12+2*(ps!=1)+2*LUMA, dst, dst_stride, src, src_stride, width, height, filter, clip, vb_pos, \ + PROLOGUE 9, 14+LUMA, UNIX64 ? 16 : (12+2*(ps!=1)+2*LUMA), dst, dst_stride, src, src_stride, width, height, filter, clip, vb_pos, \ x, s1, s2, s3, s4, s5 -%if ps != 1 +%if ps != 1 || UNIX64 pxor m14, m14 %endif -- 2.52.0 _______________________________________________ ffmpeg-devel mailing list -- [email protected] To unsubscribe send an email to [email protected]
