From: sunyuechi <sunyue...@iscas.ac.cn>
C908:
vp8_put_bilin4_h_c: 367.0
vp8_put_bilin4_h_rvv_i32: 137.7
vp8_put_bilin4_v_c: 377.0
vp8_put_bilin4_v_rvv_i32: 137.7
vp8_put_bilin8_h_c: 1431.0
vp8_put_bilin8_h_rvv_i32: 297.5
vp8_put_bilin8_v_c: 1449.0
vp8_put_bilin8_v_rvv_i32: 297.5
vp8_put_bilin16_h_c: 2839.0
vp8_put_bilin16_h_rvv_i32: 344.7
vp8_put_bilin16_v_c: 2857.0
vp8_put_bilin16_v_rvv_i32: 344.7
---
libavcodec/riscv/vp8dsp_init.c | 21 +++++++++++++++
libavcodec/riscv/vp8dsp_rvv.S | 49 ++++++++++++++++++++++++++++++++++
2 files changed, 70 insertions(+)
diff --git a/libavcodec/riscv/vp8dsp_init.c b/libavcodec/riscv/vp8dsp_init.c
index fa3feeacf7..afffa6de2f 100644
--- a/libavcodec/riscv/vp8dsp_init.c
+++ b/libavcodec/riscv/vp8dsp_init.c
@@ -34,6 +34,10 @@ VP8_EPEL(16, rvi);
VP8_EPEL(8, rvi);
VP8_EPEL(4, rvi);
+VP8_BILIN(16, rvv);
+VP8_BILIN(8, rvv);
+VP8_BILIN(4, rvv);
+
av_cold void ff_vp78dsp_init_riscv(VP8DSPContext *c)
{
#if HAVE_RV
@@ -48,6 +52,23 @@ av_cold void ff_vp78dsp_init_riscv(VP8DSPContext *c)
c->put_vp8_epel_pixels_tab[2][0][0] = ff_put_vp8_pixels4_rvi;
c->put_vp8_bilinear_pixels_tab[2][0][0] = ff_put_vp8_pixels4_rvi;
}
+#if HAVE_RVV
+ if (flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb() >= 16) {
+ c->put_vp8_bilinear_pixels_tab[0][0][1] = ff_put_vp8_bilin16_h_rvv;
+ c->put_vp8_bilinear_pixels_tab[0][0][2] = ff_put_vp8_bilin16_h_rvv;
+ c->put_vp8_bilinear_pixels_tab[1][0][1] = ff_put_vp8_bilin8_h_rvv;
+ c->put_vp8_bilinear_pixels_tab[1][0][2] = ff_put_vp8_bilin8_h_rvv;
+ c->put_vp8_bilinear_pixels_tab[2][0][1] = ff_put_vp8_bilin4_h_rvv;
+ c->put_vp8_bilinear_pixels_tab[2][0][2] = ff_put_vp8_bilin4_h_rvv;
+
+ c->put_vp8_bilinear_pixels_tab[0][1][0] = ff_put_vp8_bilin16_v_rvv;
+ c->put_vp8_bilinear_pixels_tab[0][2][0] = ff_put_vp8_bilin16_v_rvv;
+ c->put_vp8_bilinear_pixels_tab[1][1][0] = ff_put_vp8_bilin8_v_rvv;
+ c->put_vp8_bilinear_pixels_tab[1][2][0] = ff_put_vp8_bilin8_v_rvv;
+ c->put_vp8_bilinear_pixels_tab[2][1][0] = ff_put_vp8_bilin4_v_rvv;
+ c->put_vp8_bilinear_pixels_tab[2][2][0] = ff_put_vp8_bilin4_v_rvv;
+ }
+#endif
#endif
}
diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
index 8a0773f964..9bf969d794 100644
--- a/libavcodec/riscv/vp8dsp_rvv.S
+++ b/libavcodec/riscv/vp8dsp_rvv.S
@@ -20,6 +20,18 @@
#include "libavutil/riscv/asm.S"
+.macro vsetvlstatic8 len
+.if \len <= 4
+ vsetivli zero, \len, e8, mf4, ta, ma
+.elseif \len <= 8
+ vsetivli zero, \len, e8, mf2, ta, ma
+.elseif \len <= 16
+ vsetivli zero, \len, e8, m1, ta, ma
+.elseif \len <= 31
+ vsetivli zero, \len, e8, m2, ta, ma
+.endif
+.endm
+
.macro vp8_idct_dc_add
vlse32.v v0, (a0), a2
lh a5, 0(a1)
@@ -71,3 +83,40 @@ func ff_vp8_idct_dc_add4uv_rvv, zve32x
ret
endfunc
+
+.macro bilin_load dst len type mn
+.ifc \type,v
+ add t5, a2, a3
+.elseif \type == h
+ addi t5, a2, 1
+.endif
+ vle8.v \dst, (a2)
+ vle8.v v2, (t5)
+ vwmulu.vx v28, \dst, t1
+ vwmaccu.vx v28, \mn, v2
+ vwaddu.wx v24, v28, t4
+ vnsra.wi \dst, v24, 3
+.endm
+
+.macro put_vp8_bilin_h_v len type mn
+func ff_put_vp8_bilin\len\()_\type\()_rvv, zve32x
+ vsetvlstatic8 \len
+ li t1, 8
+ li t4, 4
+ sub t1, t1, \mn
+1:
+ addi a4, a4, -1
+ bilin_load v0, \len, \type, \mn
+ vse8.v v0, (a0)
+ add a2, a2, a3
+ add a0, a0, a1
+ bnez a4, 1b
+
+ ret
+endfunc
+.endm
+
+.irp len 16,8,4
+put_vp8_bilin_h_v \len h a5
+put_vp8_bilin_h_v \len v a6
+.endr
--
2.45.0
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