From 71df566c93a0b7538405cd9bb2da6da155084283 Mon Sep 17 00:00:00 2001
From: sunyuechi <sunyue...@iscas.ac.cn>
Date: Fri, 2 Feb 2024 12:50:50 +0800
Subject: [PATCH 3/3] lavc/vp8dsp: R-V V vp8_idct_dc_add4uv
c908:
vp8_idct_dc_add4uv_c: 387.7
vp8_idct_dc_add4uv_rvv_i32: 134.5
---
libavcodec/riscv/vp8dsp_init.c | 2 ++
libavcodec/riscv/vp8dsp_rvv.S | 13 +++++++++++++
2 files changed, 15 insertions(+)
diff --git a/libavcodec/riscv/vp8dsp_init.c b/libavcodec/riscv/vp8dsp_init.c
index 6615d3d440..58f0afa6f9 100644
--- a/libavcodec/riscv/vp8dsp_init.c
+++ b/libavcodec/riscv/vp8dsp_init.c
@@ -27,6 +27,7 @@
void ff_vp8_idct_dc_add_rvv(uint8_t *dst, int16_t block[16], ptrdiff_t stride);
void ff_vp8_idct_dc_add4y_rvv(uint8_t *dst, int16_t block[4][16], ptrdiff_t stride);
+void ff_vp8_idct_dc_add4uv_rvv(uint8_t *dst, int16_t block[4][16], ptrdiff_t stride);
av_cold void ff_vp8dsp_init_riscv(VP8DSPContext *c)
{
@@ -36,6 +37,7 @@ av_cold void ff_vp8dsp_init_riscv(VP8DSPContext *c)
if (flags & AV_CPU_FLAG_RVV_I32 && ff_get_rv_vlenb() >= 16) {
c->vp8_idct_dc_add = ff_vp8_idct_dc_add_rvv;
c->vp8_idct_dc_add4y = ff_vp8_idct_dc_add4y_rvv;
+ c->vp8_idct_dc_add4uv = ff_vp8_idct_dc_add4uv_rvv;
}
#endif
}
diff --git a/libavcodec/riscv/vp8dsp_rvv.S b/libavcodec/riscv/vp8dsp_rvv.S
index 87c369fb16..eb93111055 100644
--- a/libavcodec/riscv/vp8dsp_rvv.S
+++ b/libavcodec/riscv/vp8dsp_rvv.S
@@ -58,3 +58,16 @@ func ff_vp8_idct_dc_add4y_rvv, zve32x
ret
endfunc
+
+func ff_vp8_idct_dc_add4uv_rvv, zve32x
+ vsetivli zero, 4, e8, mf4, ta, ma
+ vp8_idct_dc_addy
+ vp8_idct_dc_add
+ addi a0, a0, -4
+ sh2add a0, a2, a0
+ addi a1, a1, 32
+ vp8_idct_dc_addy
+ vp8_idct_dc_add
+
+ ret
+endfunc
--
2.43.0
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