On Sat, 18 Nov 2023, Logan.Lyu wrote:

diff --git a/libavcodec/aarch64/hevcdsp_epel_neon.S b/libavcodec/aarch64/hevcdsp_epel_neon.S
index 54e55cd508..b60091bf23 100644
--- a/libavcodec/aarch64/hevcdsp_epel_neon.S
+++ b/libavcodec/aarch64/hevcdsp_epel_neon.S

+function ff_hevc_put_hevc_epel_bi_hv24_8_neon_i8mm, export=1
+        add             w10, w5, #3
+        lsl             x10, x10, #7
+        sub             sp, sp, x10 // tmp_array
+        stp             x7, x30, [sp, #-48]!
+        stp             x4, x5, [sp, #16]
+        stp             x0, x1, [sp, #32]
+        add             x0, sp, #48
+        sub             x1, x2, x3
+        mov             x2, x3
+        add             w3, w5, #3
+        mov             x4, x6
+        mov             x5, x7
+        bl              X(ff_hevc_put_hevc_epel_h24_8_neon_i8mm)
+        ldp             x4, x5, [sp, #16]
+        ldp             x0, x1, [sp, #32]
+        ldp             x7, x30, [sp], #48
+        load_epel_filterh x7, x6
+        mov             x10, #(MAX_PB_SIZE * 2)
+        ld1            {v16.8h, v17.8h, v18.8h}, [sp], x10
+        ld1            {v19.8h, v20.8h, v21.8h}, [sp], x10
+        ld1            {v22.8h, v23.8h, v24.8h}, [sp], x10
+.macro calc src0, src1, src2, src3, src4, src5, src6, src7, src8, src9, src10, src11
+        ld1            {\src9\().8h, \src10\().8h, \src11\().8h}, [sp], x10
+        calc_epelh      v1,     \src0, \src3, \src6, \src9
+        calc_epelh2     v1, v2, \src0, \src3, \src6, \src9

The ld1 instructions have misindented the {} parts

+        calc_epelh      v2,     \src1, \src4, \src7, \src10
+        calc_epelh2     v2, v3, \src1, \src4, \src7, \src10
+        calc_epelh      v3,     \src2, \src5, \src8, \src11
+        calc_epelh2     v3, v4, \src2, \src5, \src8, \src11
+        ld1            {v4.8h, v5.8h, v6.8h}, [x4], x10
+        sqadd           v1.8h, v1.8h, v4.8h
+        sqadd           v2.8h, v2.8h, v5.8h
+        sqadd           v3.8h, v3.8h, v6.8h
+        sqrshrun        v1.8b, v1.8h, #7
+        sqrshrun        v2.8b, v2.8h, #7
+        sqrshrun        v3.8b, v3.8h, #7
+        subs            w5, w5, #1
+        st1            {v1.8b, v2.8b, v3.8b}, [x0], x1
+.endm
+1:      calc_all12
+.purgem calc
+2:      ret
+endfunc
+
+function ff_hevc_put_hevc_epel_bi_hv32_8_neon_i8mm, export=1
+        sub             sp, sp, #16
+        str             d8, [sp]

This could be "str d8, [sp, #-16]!"

// Martin

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