From: Shen Peiting <shenpeit...@eswincomputing.com>
Scalar calculating int32 sum_square optimized by using RVV instructions
Benchmarks on Spike(cycles):
len=128
ac3_sum_square_butterfly_int32_c: 8497
ac3_sum_square_butterfly_int32_rvv: 258
len=1280
ac3_sum_square_butterfly_int32_c: 84529
ac3_sum_square_butterfly_int32_rvv: 2274
Co-Authored by: Yang Xiaojun <yangxiao...@eswincomputing.com>
Co-Authored by: Huang Xing <huangxi...@eswincomputing.com>
Co-Authored by: Zeng Fanchen <zengfanc...@eswincomputing.com>
Signed-off-by: Shen Peiting <shenpeit...@eswincomputing.com>
---
libavcodec/riscv/ac3dsp_init.c | 8 +++++
libavcodec/riscv/ac3dsp_rvv.S | 53 ++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+)
diff --git a/libavcodec/riscv/ac3dsp_init.c b/libavcodec/riscv/ac3dsp_init.c
index a4e75a7541..4fd4abe83e 100644
--- a/libavcodec/riscv/ac3dsp_init.c
+++ b/libavcodec/riscv/ac3dsp_init.c
@@ -26,6 +26,10 @@
void ff_ac3_exponent_min_rvv(uint8_t *exp, int num_reuse_blocks, int nb_coefs);
void ff_float_to_fixed24_rvv(int32_t *dst, const float *src, unsigned int len);
+void ff_ac3_sum_square_butterfly_int32_rvv(int64_t sum[4],
+ const int32_t *coef0,
+ const int32_t *coef1,
+ int len);
av_cold void ff_ac3dsp_init_riscv(AC3DSPContext *c)
{
@@ -35,6 +39,10 @@ av_cold void ff_ac3dsp_init_riscv(AC3DSPContext *c)
c->ac3_exponent_min = ff_ac3_exponent_min_rvv;
c->float_to_fixed24 = ff_float_to_fixed24_rvv;
}
+#if (__riscv_xlen >= 64)
+ if (flags & AV_CPU_FLAG_RVV_I64)
+ c->sum_square_butterfly_int32 = ff_ac3_sum_square_butterfly_int32_rvv;
+#endif
#endif
}
diff --git a/libavcodec/riscv/ac3dsp_rvv.S b/libavcodec/riscv/ac3dsp_rvv.S
index d98e72c12c..4e0d238f85 100644
--- a/libavcodec/riscv/ac3dsp_rvv.S
+++ b/libavcodec/riscv/ac3dsp_rvv.S
@@ -63,3 +63,56 @@ func ff_float_to_fixed24_rvv, zve32x
bgtz a2, 1b
ret
endfunc
+
+
+func ff_ac3_sum_square_butterfly_int32_rvv, zve64x
+ vsetvli t0, a3, e32, m2
+ vle32.v v0, (a1)
+ vle32.v v2, (a2)
+ vadd.vv v4, v0, v2
+ vsub.vv v6, v0, v2
+ vwmul.vv v8, v0, v0
+ vwmul.vv v12, v2, v2
+ vwmul.vv v16, v4, v4
+ vwmul.vv v20, v6, v6
+ sub a3, a3, t0
+ slli t0, t0, 2
+ add a1, a1, t0
+ add a2, a2, t0
+ beq a3, x0, 2f
+1:
+ vsetvli t0, a3, e32, m2
+ vle32.v v0, (a1)
+ vle32.v v2, (a2)
+ vadd.vv v4, v0, v2
+ vsub.vv v6, v0, v2
+ vwmacc.vv v8, v0, v0
+ vwmacc.vv v12, v2, v2
+ vwmacc.vv v16, v4, v4
+ vwmacc.vv v20, v6, v6
+ sub a3, a3, t0
+ slli t0, t0, 2
+ add a1, a1, t0
+ add a2, a2, t0
+ bnez a3, 1b
+2:
+ vsetvli t0, x0, e64, m4
+ vmv.s.x v24, x0
+ vmv.s.x v25, x0
+ vmv.s.x v26, x0
+ vmv.s.x v27, x0
+ vredsum.vs v24, v8, v24
+ vredsum.vs v25, v12, v25
+ vredsum.vs v26, v16, v26
+ vredsum.vs v27, v20, v27
+ vsetivli t0, 1, e64, m1
+ vse64.v v24, (a0)
+ addi a0, a0, 8
+ vse64.v v25, (a0)
+ addi a0, a0, 8
+ vse64.v v26, (a0)
+ addi a0, a0, 8
+ vse64.v v27, (a0)
+ addi a0, a0, 8
+ ret
+endfunc
--
2.17.1
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