Check whether the toolchain has support for RISC-V intrinsic and then
update the flag, HAVE_INTRINSICS_RVV, in the config.h
Signed-off-by: Arnie Chang <arnie.ch...@sifive.com>
---
configure | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configure b/configure
index bb7be67676..883bee1e34 100755
--- a/configure
+++ b/configure
@@ -2210,6 +2210,7 @@ HEADERS_LIST="
INTRINSICS_LIST="
intrinsics_neon
+ intrinsics_rvv
"
MATH_FUNCS="
@@ -6119,6 +6120,7 @@ elif enabled ppc; then
elif enabled riscv; then
enabled rvv && check_inline_asm rvv '".option arch, +v\nvsetivli zero, 0,
e8, m1, ta, ma"'
+ enabled rvv && check_cc intrinsics_rvv riscv_vector.h "int vl =
__riscv_vsetvl_e8m1(8)"
elif enabled x86; then
--
2.17.1
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