From: Rémi Denis-Courmont <r...@remlab.net>
RISC-V defines the CLZ instruction as part of the ratified Zbb subset
of the (not yet ratified) bit mapulation extension (B). We can detect
it from the __riscv_zbb predefined constant. At least GCC 12 already
supports this correctly.
Note that the macro will be non-zero if supported, zero if enabled
in the compiler flags (e.g. -march=rv64gzbb) but not known to the
compiler, and undefined otherwise.
---
configure | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/configure b/configure
index 9e51abd0d3..b7dc1d8656 100755
--- a/configure
+++ b/configure
@@ -5334,6 +5334,12 @@ elif enabled ppc; then
;;
esac
+elif enabled riscv; then
+
+ if test_cpp_condition stddef.h "__riscv_zbb"; then
+ enable fast_clz
+ fi
+
elif enabled sparc; then
case $cpu in
--
2.37.2
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