From: Rémi Denis-Courmont <r...@remlab.net>
RISC-V defines the CLZ instruction as part of the Zbb subset of the
bit mapulation extension (B). We can detect it from the __riscv_zbb
predefined constant. It will be non-zero if supported, zero if enabled
in the compiler flags but not supported by the compiler, and undefined
otherwise.
---
configure | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/configure b/configure
index 932ea5b553..b54ff5fc44 100755
--- a/configure
+++ b/configure
@@ -5331,6 +5331,12 @@ elif enabled ppc; then
;;
esac
+elif enabled riscv; then
+
+ if test_cpp_condition stddef.h "__riscv_zbb"; then
+ enable fast_clz
+ fi
+
elif enabled sparc; then
case $cpu in
--
2.37.2
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