On Wed, Feb 23, 2022 at 9:58 AM <jianhua.wu-at-intel....@ffmpeg.org> wrote: > +%macro HEVC_PUT_HEVC_QPEL_AVX512ICL 2 > [...] > + vpmovdw xm6, m6 > + movu [dstq], xm6
vpmovdw can take a memory operand as dst directly: vpmovdw [dstq], m6 (the same applies to the hv function) > +%macro HEVC_PUT_HEVC_QPEL_HV_AVX512ICL 2 > +cglobal hevc_put_hevc_qpel_hv%1_%2, 6, 7, 8, dst, src, srcstride, height, > mx, my, tmp This functions uses 27(?) vector registers but only specifies 8, so it will break on Windows unless corrected. > + if (EXTERNAL_AVX512ICL(cpu_flags)) { > + c->put_hevc_qpel[3][0][1] = ff_hevc_put_hevc_qpel_h8_8_avx512icl; > + c->put_hevc_qpel[3][1][1] = > ff_hevc_put_hevc_qpel_hv8_8_avx512icl; > + } Needs an ARCH_X86_64 guard as the code is 64-bit only. _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org https://ffmpeg.org/mailman/listinfo/ffmpeg-devel To unsubscribe, visit link above, or email ffmpeg-devel-requ...@ffmpeg.org with subject "unsubscribe".