LGTM
Thanks,
Nedeljko
________________________________________
Od: ffmpeg-devel-boun...@ffmpeg.org [ffmpeg-devel-boun...@ffmpeg.org] u ime
korisnika Shivraj Patil
Poslato: 1. april 2015 15:58
Za: ffmpeg-devel@ffmpeg.org
Cc: Shivraj Patil
Tema: [FFmpeg-devel] [PATCH 2/4] configure: add support for mips64r6 and
i6400 cpu
From: Shivraj Patil <shivraj.pa...@imgtec.com>
Note:- This is a preparation patch to submit optimized code for msa(mips simd
architecture).
Signed-off-by: Shivraj Patil <shivraj.pa...@imgtec.com>
---
configure | 21 +++++++++++++++++++++
1 file changed, 21 insertions(+)
diff --git a/configure b/configure
index 49be9ac..f70472e 100755
--- a/configure
+++ b/configure
@@ -361,6 +361,7 @@ Optimization options (experts only):
--disable-inline-asm disable use of inline assembly
--disable-yasm disable use of nasm/yasm assembly
--disable-mips32r5 disable MIPS32R5 optimizations
+ --disable-mips64r6 disable MIPS64R6 optimizations
--disable-mipsdspr1 disable MIPS DSP ASE R1 optimizations
--disable-mipsdspr2 disable MIPS DSP ASE R2 optimizations
--disable-msa disable MSA optimizations
@@ -1568,6 +1569,7 @@ ARCH_EXT_LIST_MIPS="
mipsfpu
mips32r2
mips32r5
+ mips64r6
mipsdspr1
mipsdspr2
msa
@@ -2014,6 +2016,7 @@ mipsfpu_deps="mips"
mipsdspr1_deps="mips"
mipsdspr2_deps="mips"
mips32r5_deps="mips"
+mips64r6_deps="mips"
msa_deps="mips"
altivec_deps="ppc"
@@ -3848,6 +3851,7 @@ elif enabled mips; then
case $cpu in
24kc)
disable mips32r5
+ disable mips64r6
disable mipsfpu
disable mipsdspr1
disable mipsdspr2
@@ -3855,32 +3859,45 @@ elif enabled mips; then
;;
24kf*)
disable mips32r5
+ disable mips64r6
disable mipsdspr1
disable mipsdspr2
disable msa
;;
24kec|34kc|1004kc)
disable mips32r5
+ disable mips64r6
disable mipsfpu
disable mipsdspr2
disable msa
;;
24kef*|34kf*|1004kf*)
disable mips32r5
+ disable mips64r6
disable mipsdspr2
disable msa
;;
74kc)
disable mips32r5
+ disable mips64r6
disable mipsfpu
disable msa
;;
p5600)
+ disable mips64r6
disable mipsdspr1
disable mipsdspr2
add_cflags "-mtune=p5600"
;;
+ i6400)
+ disable mips32r5
+ disable mipsdspr1
+ disable mipsdspr2
+ disable mipsfpu
+
+ add_cflags "-mtune=i6400"
+ ;;
esac
elif enabled ppc; then
@@ -4642,6 +4659,9 @@ elif enabled mips; then
enabled mips32r5 && add_cflags "-mips32r5 -mfp64 -msched-weight
-mload-store-pairs -funroll-loops" &&
add_asflags "-mips32r5 -mfp64" && add_ldflags "-mips32r5 -mfp64" &&
check_inline_asm mips32r5 '"ulw $t0, ($t1)"'
+ enabled mips64r6 && add_cflags "-mips64r6 -mfp64 -msched-weight
-mload-store-pairs -funroll-loops" &&
+ add_asflags "-mips64r6 -mfp64" && add_ldflags "-mips64r6 -mfp64" &&
+ check_inline_asm mips64r6 '"aui $t0, $t1, 1"'
enabled mipsdspr1 && add_cflags "-mdsp" && add_asflags "-mdsp" &&
check_inline_asm mipsdspr1 '"addu.qb $t0, $t1, $t2"'
enabled mipsdspr2 && add_cflags "-mdspr2" && add_asflags "-mdspr2" &&
@@ -5610,6 +5630,7 @@ fi
if enabled mips; then
echo "MIPS FPU enabled ${mipsfpu-no}"
echo "MIPS32R5 enabled ${mips32r5-no}"
+ echo "MIPS64R6 enabled ${mips64r6-no}"
echo "MIPS DSP R1 enabled ${mipsdspr1-no}"
echo "MIPS DSP R2 enabled ${mipsdspr2-no}"
echo "MIPS MSA enabled ${msa-no}"
--
2.3.2
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