Hi,
2015-02-08 14:28 GMT+01:00 Ronald S. Bultje <rsbul...@gmail.com>:
> Cool! Do you know if it catches all assembly types now (e.g. does it catch
> mmxext in mmx functions)? Or is it >=sse only?
Good thing that you asked, because I attached an earlier version...
So I think what you ask was checked by the first "warn" commit,
because of differing insn set (haven't checked though).
This one is specifically for "might be insn set a or b, but reg size
makes it clearer".
--
Christophe
From cc1f681defcde77bf1a371633c0eba155b93f235 Mon Sep 17 00:00:00 2001
From: Christophe Gisquet <christophe.gisq...@gmail.com>
Date: Tue, 3 Feb 2015 20:40:41 +0100
Subject: [PATCH] x86inc: Correctly warn on use of SSE2 instructions in SSE
functions
SSE2 instructions that are XMM-implementations of pre-existing MMX/MMX2
instructions did not issue warnings when used in SSE functions. Handle
it by also checking the register type when such instructions are used.
---
libavutil/x86/x86inc.asm | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/libavutil/x86/x86inc.asm b/libavutil/x86/x86inc.asm
index 33b22cd..f1b4b85 100644
--- a/libavutil/x86/x86inc.asm
+++ b/libavutil/x86/x86inc.asm
@@ -1073,6 +1073,8 @@ INIT_XMM
%ifdef cpuname
%if notcpuflag(%2)
%error use of ``%1'' %2 instruction in cpuname function: current_function
+ %elif cpuflags_%2 < cpuflags_sse && notcpuflag(sse2) && __sizeofreg > 8
+ %error use of ``%1'' sse2 instruction in cpuname function: current_function
%endif
%endif
%endif
@@ -1209,7 +1211,7 @@ AVX_INSTR minsd, sse2, 1, 0, 1
AVX_INSTR minss, sse, 1, 0, 1
AVX_INSTR movapd, sse2
AVX_INSTR movaps, sse
-AVX_INSTR movd
+AVX_INSTR movd, mmx
AVX_INSTR movddup, sse3
AVX_INSTR movdqa, sse2
AVX_INSTR movdqu, sse2
@@ -1225,7 +1227,7 @@ AVX_INSTR movntdq, sse2
AVX_INSTR movntdqa, sse4
AVX_INSTR movntpd, sse2
AVX_INSTR movntps, sse
-AVX_INSTR movq
+AVX_INSTR movq, mmx
AVX_INSTR movsd, sse2, 1, 0, 0
AVX_INSTR movshdup, sse3
AVX_INSTR movsldup, sse3
--
1.9.2.msysgit.0
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