On 07/11/14 6:05 AM, Christophe Gisquet wrote: > Hi, > > 2014-11-06 23:04 GMT+01:00 James Almer <jamr...@gmail.com>: >> No, the function checks for alignment and jumps to a branch that uses movdqu >> if needed. >> ff_int32_to_float_a_avx also uses ymm regs and this same macro. > > OK, so nothing new here, same 32-bytes alignment. > >> when "mulps m0, m1, [mem]" would work just as well regardless of alignment. > > It does with AVX? That shows I never used it...
http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-software-developer-vol-1-manual.pdf Chapter 14.9. It's pretty convenient, but taking advantage of it would require uglyfing macros or making the avx functions separate. > >> If you use "cmpps m0, m1, 5" it will work for non-VEX coding, but error out >> otherwise >> since x86inc.asm turns that into "vcmpps m0, m1, 5" instead of "vcmpps m0, >> m0, m1, 5" >> >> With aliases like cmpnltps it doesn't even add the "v" prefix. > > OK. As you are the number one developer for AVX, it's up to you > whether that would need a more generic fix :-) > > Someone actually used to AVX should comment, but this patch looks so > simple that you should apply it tomorrow if nobody objects. > I was waiting for Michael to comment since he's the swr maintainer. Otherwise I'd have pushed it after your ok. > Best regards, > Thanks. _______________________________________________ ffmpeg-devel mailing list ffmpeg-devel@ffmpeg.org http://ffmpeg.org/mailman/listinfo/ffmpeg-devel