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commit e69c1d87f208cfcbacc5c55c175368c91d7a1e3e Author: Ramiro Polla <[email protected]> AuthorDate: Sun Jul 19 20:23:45 2026 +0200 Commit: Ramiro Polla <[email protected]> CommitDate: Wed Jul 22 14:07:37 2026 +0000 swscale/aarch64/ops_asmgen: populate operands matrix in asmgen_setup_linear() This will serve multiple purposes: - Allow JIT code to populate operands from a deduplicated data pool; - Simplify the future implementation of integer linear operation, since mul/mla take full vector registers as coefficients, and not elements. Sponsored-by: Sovereign Tech Fund Signed-off-by: Ramiro Polla <[email protected]> --- libswscale/aarch64/ops_asmgen.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) diff --git a/libswscale/aarch64/ops_asmgen.c b/libswscale/aarch64/ops_asmgen.c index 9e9ae02fdc..b76aba1717 100644 --- a/libswscale/aarch64/ops_asmgen.c +++ b/libswscale/aarch64/ops_asmgen.c @@ -131,6 +131,7 @@ typedef struct SwsAArch64OpRegs { /* Op-specific registers. */ union { RasmOp dither_ptr; + RasmOp linear_vcoeff[4][5]; }; } SwsAArch64OpRegs; @@ -1167,15 +1168,23 @@ static void asmgen_setup_linear(SwsAArch64Context *s, const SwsAArch64OpImplPara asmgen_set_load_cont_node(s); i_ld1(r, coeff_veclist, a64op_base(ptr)); CMT("coeff_veclist = *vcoeff_ptr;"); - /* Compute mask for rows that must be saved before being overwritten. */ + /** + * Populate operands matrix from packed data into linear_vcoeff matrix + * and compute mask for rows that must be saved before being overwritten. + */ SwsCompMask save_mask = 0; bool overwritten[4] = { false, false, false, false }; + int i_coeff = 0; LOOP_MASK(p, i) { for (int j = 0; j < 5; j++) { bool is_offset = (j == 0); int src_j = is_offset ? 4 : (j - 1); if (p->par.lin.zero & SWS_MASK(i, src_j)) continue; + uint8_t vc_i = i_coeff / 4; + uint8_t vc_j = i_coeff & 3; + regs->linear_vcoeff[i][j] = a64op_elem(vc[vc_i], vc_j); + i_coeff++; if (!is_offset && overwritten[src_j]) save_mask |= SWS_COMP(src_j); overwritten[i] = true; @@ -1207,7 +1216,6 @@ static void linear_pass(SwsAArch64Context *s, const SwsAArch64OpImplParams *p, * is set) start from temp vector 8. */ RasmOp *vt = regs->vt; - RasmOp *vc = regs->vk; RasmOp *vtmp = &vt[8]; RasmOp *sx = vh_pass ? regs->sh : regs->sl; RasmOp *dx = vh_pass ? regs->dh : regs->dl; @@ -1221,7 +1229,6 @@ static void linear_pass(SwsAArch64Context *s, const SwsAArch64OpImplParams *p, * in sequential order into the individual lanes of the coefficient * vector registers. We must follow the same order of execution here. */ - int i_coeff = 0; LOOP_MASK(p, i) { bool first = true; RasmNode *pre_mul = rasm_get_current_node(r); @@ -1231,10 +1238,7 @@ static void linear_pass(SwsAArch64Context *s, const SwsAArch64OpImplParams *p, if (p->par.lin.zero & SWS_MASK(i, src_j)) continue; RasmOp vsrc = sx[src_j]; - uint8_t vc_i = i_coeff / 4; - uint8_t vc_j = i_coeff & 3; - RasmOp vcoeff = a64op_elem(vc[vc_i], vc_j); - i_coeff++; + RasmOp vcoeff = regs->linear_vcoeff[i][j]; if (first && is_offset) { i_dup (r, dx[i], vcoeff); CMTF("v%c[%u] = broadcast(offset[%u]);", cvh, i, i); } else if (first && !is_offset) { _______________________________________________ ffmpeg-cvslog mailing list -- [email protected] To unsubscribe send an email to [email protected]
