James Louis wrote: > Thanks for the reply Kirk. Having explained it, would you (or anyone) mind > translating the following generic sample to "net" without deleting any signal > names? : > > newsig signalnameA bit > newsig signalnameB bit > newsig signalnameC bit > linksp signalnameA <= inputpin1 > linksp signalnameA => axis.0.negativelimit > linksp signalnameB <= inputpin2 > linksp signalnameB => axis.0.positivelimit > linksp signalnameC <= inputpin2 > linksp signalnameC => axis.0.home > > Keep in mind that this worked perfectly in older versions of EMC2, but not in > newer versions. Now 2 signal names cannot be assigned to a single pin > without causing an error. > > As Stephen says in another reply, it probably did NOT work in the previous version, it just didn't produce an error message and kill EMC2. Anyway, what you want to do is not needed. There is no case where an output pin needs to drive two signals. The two signals would be identical at all times. So, what you want is : net sigA inputpin1 axis.0.negativelimit net sigB inputpin2 axis.0.positivelimit axis.0.home
Jon ------------------------------------------------------------------------------ This SF.net email is sponsored by Sprint What will you do first with EVO, the first 4G phone? Visit sprint.com/first -- http://p.sf.net/sfu/sprint-com-first _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
