On Sunday 04 January 2009, Peter C. Wallace wrote: >uOn Sat, 3 Jan 2009, Gene Heskett wrote: > >SNIP_______________ > >> As a matter of fact, yes. The quad core amd phenoms, (I have a slow one >> in this box) with some additional controls in the kernel to release one >> core just for the realtime stuff, and then hand that core to rtai, seems >> like it might be a pretty ideal situation. The only latency problem I >> could see would be in freeing up the buss when it needs to access the >> parport, some method of freezing the other 3 cores in their tracks for a >> couple of cpu cycles might have to be worked out. >> >> Either that, or do a 'propeller' board for that part, in which case the >> base loop could probably go away. >> >> I've been looking at that chip since it came out, has anyone here played >> with it yet? > >A perhaps more interesting chip for current "hardware replaced by software" >designs is the 4 core XMOS (XS1-G4) with 4x 400 MHz cores each with 8 > hardware contexts, about $20 for 1 piece (144 pin) and a $99 devkit. Kind > of Ubicom on steroids...
Sounds interesting, but will it be around 10 years from now? I don't think that is too unreasonable even if I might not be. We do have chip makers checking in now & then with 25 year old stuff, and it seems hard enough to convince the folks using older emc versions to get current versions installed cuz you fixed that bug 2 years ago. They don't want to contemplate the loss of money that an extended downtime debugging a newer version might entail. >On the other hand you can do a lot with a embedded 32 bit processor in a > FPGA (the ZPU for example uses about 20% of a 400K SP3, runs at ~ 100 MHz, > is BSD licensed and has a GCC toolchain) Which again, sounds like a plus till you said 100mhz. That might do for servo driven machines but I'd guess it won't run steppers at usable speeds will it? Running on bog stock older machines is nice, but when they peter out, it seems to make sense to goto a newer, multicore processor, and arrange to give the realtime stuff to one core exclusively, which should at least make the latencies that plague a stepper setup become much more consistent. To me there is a large attraction to being able to run down to wallyworld for a new box when a controller upchucks, and install linux+emc2 on the new box, which might have it back to making swarf in 3 hours if the installer is written carefully, and backups of the configs are just a network copy away. If I was awake, its too late now for me, I might carve up a message to lkml, and see if anyone has an idea of how much trouble it might be to pretend a 4 core phenom is a 3 core chip, and hand the 4th core to rtai, operating not in a sandbox cuz that would deny hdwe access, but I'd think something along those lines could be put together, and probably without major surgery to the core smp code linux now has. -- Cheers, Gene "There are four boxes to be used in defense of liberty: soap, ballot, jury, and ammo. Please use in that order." -Ed Howdershelt (Author) "Kill the Wabbit, Kill the Wabbit, Kill the Wabbit!" -- Looney Tunes, "What's Opera Doc?" (1957, Chuck Jones) ------------------------------------------------------------------------------ _______________________________________________ Emc-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/emc-users
