On Tue, Mar 25, 2014 at 10:39 PM, Ronciak, John <[email protected]> wrote: > How are the different PCIe slots connected into the system? In a lot of > cases some of the slots are not all equal in terms of how they are laid out > in the system. If you move the interface doing the 20ms read to a NIC in a > different slot does the behavior change? Does the i/f on the m/b if used for > the 20ms read work correctly? >
The odd part is that the process doing the 20ms read is reading from a virtual tap interface (/dev/net/tun) and not from one of the NICs. It seems like bringing down the igb interface is causing some system level lock at least for network I/O? Aaron ------------------------------------------------------------------------------ Learn Graph Databases - Download FREE O'Reilly Book "Graph Databases" is the definitive new guide to graph databases and their applications. Written by three acclaimed leaders in the field, this first edition is now available. Download your free book today! http://p.sf.net/sfu/13534_NeoTech _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
