As result of recent re-design of the MSI/MSI-X interrupts enabling pattern this driver has to be updated to use the new technique to obtain a optimal number of MSI/MSI-X interrupts required.
Signed-off-by: Alexander Gordeev <[email protected]> --- drivers/net/ethernet/brocade/bna/bnad.c | 34 ++++++++++++------------------ 1 files changed, 14 insertions(+), 20 deletions(-) diff --git a/drivers/net/ethernet/brocade/bna/bnad.c b/drivers/net/ethernet/brocade/bna/bnad.c index b78e69e..d41257c 100644 --- a/drivers/net/ethernet/brocade/bna/bnad.c +++ b/drivers/net/ethernet/brocade/bna/bnad.c @@ -2469,21 +2469,11 @@ bnad_enable_msix(struct bnad *bnad) if (bnad->msix_table) return; - bnad->msix_table = - kcalloc(bnad->msix_num, sizeof(struct msix_entry), GFP_KERNEL); - - if (!bnad->msix_table) + ret = pci_msix_table_size(bnad->pcidev); + if (ret < 0) goto intx_mode; - for (i = 0; i < bnad->msix_num; i++) - bnad->msix_table[i].entry = i; - - ret = pci_enable_msix(bnad->pcidev, bnad->msix_table, bnad->msix_num); - if (ret > 0) { - /* Not enough MSI-X vectors. */ - pr_warn("BNA: %d MSI-X vectors allocated < %d requested\n", - ret, bnad->msix_num); - + if (ret < bnad->msix_num) { spin_lock_irqsave(&bnad->bna_lock, flags); /* ret = #of vectors that we got */ bnad_q_num_adjust(bnad, (ret - BNAD_MAILBOX_MSIX_VECTORS) / 2, @@ -2495,15 +2485,19 @@ bnad_enable_msix(struct bnad *bnad) if (bnad->msix_num > ret) goto intx_mode; + } - /* Try once more with adjusted numbers */ - /* If this fails, fall back to INTx */ - ret = pci_enable_msix(bnad->pcidev, bnad->msix_table, - bnad->msix_num); - if (ret) - goto intx_mode; + bnad->msix_table = + kcalloc(bnad->msix_num, sizeof(struct msix_entry), GFP_KERNEL); + + if (!bnad->msix_table) + goto intx_mode; - } else if (ret < 0) + for (i = 0; i < bnad->msix_num; i++) + bnad->msix_table[i].entry = i; + + ret = pci_enable_msix(bnad->pcidev, bnad->msix_table, bnad->msix_num); + if (ret) goto intx_mode; pci_intx(bnad->pcidev, 0); -- 1.7.7.6 ------------------------------------------------------------------------------ October Webinars: Code for Performance Free Intel webinars can help you accelerate application performance. Explore tips for MPI, OpenMP, advanced profiling, and more. Get the most from the latest Intel processors and coprocessors. See abstracts and register > http://pubads.g.doubleclick.net/gampad/clk?id=60134791&iu=/4140/ostg.clktrk _______________________________________________ E1000-devel mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/e1000-devel To learn more about Intel® Ethernet, visit http://communities.intel.com/community/wired
