Branch: refs/heads/angushe/riscv
Home: https://github.com/dyninst/dyninst
Commit: 07760360f9a2cbde53c8bbecbf896f527b59c865
https://github.com/dyninst/dyninst/commit/07760360f9a2cbde53c8bbecbf896f527b59c865
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-03-24 (Mon, 24 Mar 2025)
Changed paths:
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
Log Message:
-----------
Add flag to compressed instructions generation
Commit: 44c38c29f827d9958b9f1fff47fa2ab6301079f8
https://github.com/dyninst/dyninst/commit/44c38c29f827d9958b9f1fff47fa2ab6301079f8
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-03-25 (Tue, 25 Mar 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/Relocation/Widgets/PCWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/codegen.C
M dyninstAPI/src/codegen.h
M dyninstAPI/src/emit-riscv64.C
M dyninstAPI/src/emit-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
A dyninstAPI/src/req.txt
Log Message:
-----------
Huge update
Commit: e0f818626ba775fd96f3fea2c9dc50e3ecab32f4
https://github.com/dyninst/dyninst/commit/e0f818626ba775fd96f3fea2c9dc50e3ecab32f4
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-03-26 (Wed, 26 Mar 2025)
Changed paths:
M common/src/arch-aarch64.h
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Split codegen into multiple of 16 bits
Commit: 133cbf70d33a415208563b1b874310a4958e74af
https://github.com/dyninst/dyninst/commit/133cbf70d33a415208563b1b874310a4958e74af
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-03-28 (Fri, 28 Mar 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
Log Message:
-----------
Fix indexing issue
Commit: 92bce237375c37b585f73fe3a082696a6ddd64a7
https://github.com/dyninst/dyninst/commit/92bce237375c37b585f73fe3a082696a6ddd64a7
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-03-29 (Sat, 29 Mar 2025)
Changed paths:
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/inst-riscv64.C
Log Message:
-----------
Fix RISC-V ret bugs
Commit: 2c7aec4f37c1ec1a395e2a3df2a0ff87c65f4ae1
https://github.com/dyninst/dyninst/commit/2c7aec4f37c1ec1a395e2a3df2a0ff87c65f4ae1
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-04-03 (Thu, 03 Apr 2025)
Changed paths:
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Fix stack and instruction bugs
Commit: 1cdad490f05fe1677f7e14cc01aa0dbdb4dd3e71
https://github.com/dyninst/dyninst/commit/1cdad490f05fe1677f7e14cc01aa0dbdb4dd3e71
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-04-04 (Fri, 04 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/Relocation/Widgets/CFWidget-riscv64.C
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
Log Message:
-----------
Fix long branch bug
Commit: 9e8804187bb47c534368d540faeafe2258eef045
https://github.com/dyninst/dyninst/commit/9e8804187bb47c534368d540faeafe2258eef045
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-04-05 (Sat, 05 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M dyninstAPI/src/codegen-riscv64.C
M dyninstAPI/src/codegen-riscv64.h
M dyninstAPI/src/inst-riscv64.C
M dyninstAPI/src/inst-riscv64.h
Log Message:
-----------
Add modifyData and fix auipc jalr bug
Commit: 59e1cfba7aef86dcd141b58ce9fd57fa8ee1675e
https://github.com/dyninst/dyninst/commit/59e1cfba7aef86dcd141b58ce9fd57fa8ee1675e
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-04-10 (Thu, 10 Apr 2025)
Changed paths:
M common/src/arch-riscv64.C
M common/src/arch-riscv64.h
M common/src/registers/MachRegister.C
Log Message:
-----------
Add Marco's patch
Commit: 9b9b9baa396c04bf6688303f48d88b61aa745b64
https://github.com/dyninst/dyninst/commit/9b9b9baa396c04bf6688303f48d88b61aa745b64
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-04-11 (Fri, 11 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M instructionAPI/src/InstructionDecoder-riscv64.C
Log Message:
-----------
Change PC to read PC register
Commit: b448b712efa9a398d450573bef236d51934c63a3
https://github.com/dyninst/dyninst/commit/b448b712efa9a398d450573bef236d51934c63a3
Author: wxrdnx <wxr...@protonmail.com>
Date: 2025-04-15 (Tue, 15 Apr 2025)
Changed paths:
M dataflowAPI/rose/semantics/DispatcherRiscv64.C
M dataflowAPI/sail/sail_to_rose.pl
Log Message:
-----------
Patch RISC-V SAIL parser
Compare: https://github.com/dyninst/dyninst/compare/d0365615a64a...b448b712efa9
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