Now that segment address is available, support for multi-slice frames
can be easily added.

Signed-off-by: Jernej Skrabec <jernej.skra...@siol.net>
---
 .../staging/media/sunxi/cedrus/cedrus_h265.c  | 21 +++++++++++++++----
 .../staging/media/sunxi/cedrus/cedrus_video.c |  1 +
 2 files changed, 18 insertions(+), 4 deletions(-)

diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c 
b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
index 888bfd5ca224..e909adf6f30f 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_h265.c
@@ -366,15 +366,28 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
        reg = VE_DEC_H265_BITS_END_ADDR_BASE(src_buf_end_addr);
        cedrus_write(dev, VE_DEC_H265_BITS_END_ADDR, reg);
 
-       /* Coding tree block address: start at the beginning. */
+       /* Coding tree block address */
        reg = VE_DEC_H265_DEC_CTB_ADDR_X(0) | VE_DEC_H265_DEC_CTB_ADDR_Y(0);
+       if (!ctx->fh.m2m_ctx->new_frame) {
+               unsigned int log2_max_luma_coding_block_size =
+                       sps->log2_min_luma_coding_block_size_minus3 + 3 +
+                       sps->log2_diff_max_min_luma_coding_block_size;
+               unsigned int ctb_size_luma =
+                       1UL << log2_max_luma_coding_block_size;
+               unsigned int width_in_ctb_luma =
+                       DIV_ROUND_UP(sps->pic_width_in_luma_samples, 
ctb_size_luma);
+
+               reg = 
VE_DEC_H265_DEC_CTB_ADDR_X(slice_params->slice_segment_addr % 
width_in_ctb_luma);
+               reg |= 
VE_DEC_H265_DEC_CTB_ADDR_Y(slice_params->slice_segment_addr / 
width_in_ctb_luma);
+       }
        cedrus_write(dev, VE_DEC_H265_DEC_CTB_ADDR, reg);
 
        cedrus_write(dev, VE_DEC_H265_TILE_START_CTB, 0);
        cedrus_write(dev, VE_DEC_H265_TILE_END_CTB, 0);
 
        /* Clear the number of correctly-decoded coding tree blocks. */
-       cedrus_write(dev, VE_DEC_H265_DEC_CTB_NUM, 0);
+       if (ctx->fh.m2m_ctx->new_frame)
+               cedrus_write(dev, VE_DEC_H265_DEC_CTB_NUM, 0);
 
        /* Initialize bitstream access. */
        cedrus_write(dev, VE_DEC_H265_TRIGGER, VE_DEC_H265_TRIGGER_INIT_SWDEC);
@@ -523,8 +536,8 @@ static void cedrus_h265_setup(struct cedrus_ctx *ctx,
                                V4L2_HEVC_PPS_FLAG_DEPENDENT_SLICE_SEGMENT,
                                pps->flags);
 
-       /* FIXME: For multi-slice support. */
-       reg |= VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
+       if (ctx->fh.m2m_ctx->new_frame)
+               reg |= 
VE_DEC_H265_DEC_SLICE_HDR_INFO0_FLAG_FIRST_SLICE_SEGMENT_IN_PIC;
 
        cedrus_write(dev, VE_DEC_H265_DEC_SLICE_HDR_INFO0, reg);
 
diff --git a/drivers/staging/media/sunxi/cedrus/cedrus_video.c 
b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
index 15cf1f10221b..497b1199d3fe 100644
--- a/drivers/staging/media/sunxi/cedrus/cedrus_video.c
+++ b/drivers/staging/media/sunxi/cedrus/cedrus_video.c
@@ -311,6 +311,7 @@ static int cedrus_s_fmt_vid_out(struct file *file, void 
*priv,
 
        switch (ctx->src_fmt.pixelformat) {
        case V4L2_PIX_FMT_H264_SLICE:
+       case V4L2_PIX_FMT_HEVC_SLICE:
                vq->subsystem_flags |=
                        VB2_V4L2_FL_SUPPORTS_M2M_HOLD_CAPTURE_BUF;
                break;
-- 
2.23.0

_______________________________________________
devel mailing list
de...@linuxdriverproject.org
http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel

Reply via email to