As suggested by checkpatch.pl, use the BIT macro to define the register bits.
Signed-off-by: H Hartley Sweeten <hswee...@visionengravers.com> Cc: Ian Abbott <abbo...@mev.co.uk> Cc: Greg Kroah-Hartman <gre...@linuxfoundation.org> --- drivers/staging/comedi/drivers/adv_pci1724.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) diff --git a/drivers/staging/comedi/drivers/adv_pci1724.c b/drivers/staging/comedi/drivers/adv_pci1724.c index 9677111..bf6a8f1 100644 --- a/drivers/staging/comedi/drivers/adv_pci1724.c +++ b/drivers/staging/comedi/drivers/adv_pci1724.c @@ -54,16 +54,17 @@ * PCI bar 2 Register I/O map (dev->iobase) */ #define PCI1724_DAC_CTRL_REG 0x00 -#define PCI1724_DAC_CTRL_GX(x) (1 << (20 + ((x) / 8))) +#define PCI1724_DAC_CTRL_GX(x) BIT(20 + ((x) / 8)) #define PCI1724_DAC_CTRL_CX(x) (((x) % 8) << 16) -#define PCI1724_DAC_CTRL_MODE_GAIN (1 << 14) -#define PCI1724_DAC_CTRL_MODE_OFFSET (2 << 14) -#define PCI1724_DAC_CTRL_MODE_NORMAL (3 << 14) -#define PCI1724_DAC_CTRL_MODE_MASK (3 << 14) +#define PCI1724_DAC_CTRL_MODE(x) (((x) & 0x3) << 14) +#define PCI1724_DAC_CTRL_MODE_GAIN PCI1724_DAC_CTRL_MODE(1) +#define PCI1724_DAC_CTRL_MODE_OFFSET PCI1724_DAC_CTRL_MODE(2) +#define PCI1724_DAC_CTRL_MODE_NORMAL PCI1724_DAC_CTRL_MODE(3) +#define PCI1724_DAC_CTRL_MODE_MASK PCI1724_DAC_CTRL_MODE(3) #define PCI1724_DAC_CTRL_DATA(x) (((x) & 0x3fff) << 0) #define PCI1724_SYNC_CTRL_REG 0x04 -#define PCI1724_SYNC_CTRL_DACSTAT (1 << 1) -#define PCI1724_SYNC_CTRL_SYN (1 << 0) +#define PCI1724_SYNC_CTRL_DACSTAT BIT(1) +#define PCI1724_SYNC_CTRL_SYN BIT(0) #define PCI1724_EEPROM_CTRL_REG 0x08 #define PCI1724_SYNC_TRIG_REG 0x0c /* any value works */ #define PCI1724_BOARD_ID_REG 0x10 -- 2.5.1 _______________________________________________ devel mailing list de...@linuxdriverproject.org http://driverdev.linuxdriverproject.org/mailman/listinfo/driverdev-devel
