On Thu, Nov 27, 2014 at 10:53:58AM +0800, micky_ch...@realsil.com.cn wrote:
> +static inline void rtsx_pci_write_be32(struct rtsx_pcr *pcr, u16 reg, u32 
> val)
> +{
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, val >> 24);
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 16);
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 8);
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val);

This assumes the cpu is little endian.  First convert to big endian
using cpu_to_be32() and then write it out.

        __be32 be_val = cpu_to_be32()

        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, be_val);
        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, be_val >> 8);
        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, be_val >> 16);
        rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, be_val >> 24);

(Written hurredly in my mail client.  May be wrong).

> +}
> +
> +static inline void rtsx_pci_write_le32(struct rtsx_pcr *pcr, u16 reg, u32 
> val)
> +{
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg,     0xFF, val);
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 1, 0xFF, val >> 8);
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 2, 0xFF, val >> 16);
> +     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, reg + 3, 0xFF, val >> 24);
> +}

We don't have a user for rtsx_pci_write_le32() so don't add it.

regards,
dan carpenter
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