On 12/06/13 06:27, Masanari Iida wrote:
> Correct spelling typo.
> 
> Signed-off-by: Masanari Iida <standby2...@gmail.com>

Acked-by: Randy Dunlap <rdun...@infradead.org>

Thanks.

> ---
>  drivers/staging/crystalhd/bc_dts_glob_lnx.h | 2 +-
>  drivers/staging/crystalhd/crystalhd_cmds.c  | 2 +-
>  drivers/staging/crystalhd/crystalhd_cmds.h  | 2 +-
>  drivers/staging/crystalhd/crystalhd_fw_if.h | 2 +-
>  drivers/staging/crystalhd/crystalhd_hw.c    | 2 +-
>  drivers/staging/crystalhd/crystalhd_hw.h    | 6 +++---
>  drivers/staging/crystalhd/crystalhd_lnx.h   | 2 +-
>  drivers/staging/crystalhd/crystalhd_misc.c  | 4 ++--
>  drivers/staging/crystalhd/crystalhd_misc.h  | 2 +-
>  9 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/drivers/staging/crystalhd/bc_dts_glob_lnx.h 
> b/drivers/staging/crystalhd/bc_dts_glob_lnx.h
> index 981708f..92b0cff 100644
> --- a/drivers/staging/crystalhd/bc_dts_glob_lnx.h
> +++ b/drivers/staging/crystalhd/bc_dts_glob_lnx.h
> @@ -229,7 +229,7 @@ enum BC_DRV_CMD {
>       DRV_CMD_REG_RD,         /* Read Device Register */
>       DRV_CMD_REG_WR,         /* Write Device Register */
>       DRV_CMD_FPGA_RD,        /* Read FPGA Register */
> -     DRV_CMD_FPGA_WR,        /* Wrtie FPGA Reister */
> +     DRV_CMD_FPGA_WR,        /* Write FPGA Register */
>       DRV_CMD_MEM_RD,         /* Read Device Memory */
>       DRV_CMD_MEM_WR,         /* Write Device Memory */
>       DRV_CMD_RD_PCI_CFG,     /* Read PCI Config Space */
> diff --git a/drivers/staging/crystalhd/crystalhd_cmds.c 
> b/drivers/staging/crystalhd/crystalhd_cmds.c
> index 3972b52..642f438 100644
> --- a/drivers/staging/crystalhd/crystalhd_cmds.c
> +++ b/drivers/staging/crystalhd/crystalhd_cmds.c
> @@ -798,7 +798,7 @@ static const struct crystalhd_cmd_tbl     
> g_crystalhd_cproc_tbl[] = {
>   *
>   * Current gstreamer frame work does not provide any power management
>   * related notification to user mode decoder plug-in. As a work-around
> - * we pass on the power mangement notification to our plug-in by completing
> + * we pass on the power management notification to our plug-in by completing
>   * all outstanding requests with BC_STS_IO_USER_ABORT return code.
>   */
>  enum BC_STATUS crystalhd_suspend(struct crystalhd_cmd *ctx,
> diff --git a/drivers/staging/crystalhd/crystalhd_cmds.h 
> b/drivers/staging/crystalhd/crystalhd_cmds.h
> index 377cd9d..b5bf59d 100644
> --- a/drivers/staging/crystalhd/crystalhd_cmds.h
> +++ b/drivers/staging/crystalhd/crystalhd_cmds.h
> @@ -29,7 +29,7 @@
>  
>  /*
>   * NOTE:: This is the main interface file between the Linux layer
> - *        and the harware layer. This file will use the definitions
> + *        and the hardware layer. This file will use the definitions
>   *        from _dts_glob and dts_defs etc.. which are defined for
>   *        windows.
>   */
> diff --git a/drivers/staging/crystalhd/crystalhd_fw_if.h 
> b/drivers/staging/crystalhd/crystalhd_fw_if.h
> index 4b363a5..05615e2 100644
> --- a/drivers/staging/crystalhd/crystalhd_fw_if.h
> +++ b/drivers/staging/crystalhd/crystalhd_fw_if.h
> @@ -115,7 +115,7 @@ struct fgt_sei {
>       unsigned char model_id; /* Model id. */
>  
>       /* +unused SE based on Thomson spec */
> -     unsigned char color_desc_flag;  /* Separate color descrition flag. */
> +     unsigned char color_desc_flag;  /* Separate color description flag. */
>       unsigned char bit_depth_luma;   /* Bit depth luma minus 8. */
>       unsigned char bit_depth_chroma; /* Bit depth chroma minus 8. */
>       unsigned char full_range_flag;  /* Full range flag. */
> diff --git a/drivers/staging/crystalhd/crystalhd_hw.c 
> b/drivers/staging/crystalhd/crystalhd_hw.c
> index 043bd49..8d0680d 100644
> --- a/drivers/staging/crystalhd/crystalhd_hw.c
> +++ b/drivers/staging/crystalhd/crystalhd_hw.c
> @@ -398,7 +398,7 @@ static void crystalhd_hw_free_rx_pkt(struct crystalhd_hw 
> *hw,
>   * Call back from TX - IOQ deletion.
>   *
>   * This routine will release the TX DMA rings allocated
> - * druing setup_dma rings interface.
> + * during setup_dma rings interface.
>   *
>   * Memory is allocated per DMA ring basis. This is just
>   * a place holder to be able to create the dio queues.
> diff --git a/drivers/staging/crystalhd/crystalhd_hw.h 
> b/drivers/staging/crystalhd/crystalhd_hw.h
> index 3780944..d5cb68d 100644
> --- a/drivers/staging/crystalhd/crystalhd_hw.h
> +++ b/drivers/staging/crystalhd/crystalhd_hw.h
> @@ -46,7 +46,7 @@
>  #define Cpu2HstMbx1          0x00100F04
>  #define MbxStat1             0x00100F08
>  #define Stream2Host_Intr_Sts 0x00100F24
> -#define C011_RET_SUCCESS     0x0 /* Reutrn status of firmware command. */
> +#define C011_RET_SUCCESS     0x0 /* Return status of firmware command. */
>  
>  /* TS input status register */
>  #define TS_StreamAFIFOStatus 0x0010044C
> @@ -141,7 +141,7 @@ union link_misc_perst_deco_ctrl {
>               uint32_t        reserved0:3;            /* Reserved.No Effect*/
>               uint32_t        stop_bcm_7412_clk:1;    /* 1 ->Stops branch of
>                                               27MHz clk used to clk BCM7412*/
> -             uint32_t        reserved1:27;           /* Reseved. No Effect*/
> +             uint32_t        reserved1:27;           /* Reserved. No Effect*/
>       };
>  
>       uint32_t        whole_reg;
> @@ -176,7 +176,7 @@ union link_misc_perst_decoder_ctrl {
>               uint32_t        res0:3; /* Reserved.No Effect*/
>               uint32_t        stop_7412_clk:1; /* 1 ->Stops branch of 27MHz
>                                                clk used to clk BCM7412*/
> -             uint32_t        res1:27; /* Reseved. No Effect */
> +             uint32_t        res1:27; /* Reserved. No Effect */
>       };
>  
>       uint32_t        whole_reg;
> diff --git a/drivers/staging/crystalhd/crystalhd_lnx.h 
> b/drivers/staging/crystalhd/crystalhd_lnx.h
> index bac572a..33d7431 100644
> --- a/drivers/staging/crystalhd/crystalhd_lnx.h
> +++ b/drivers/staging/crystalhd/crystalhd_lnx.h
> @@ -53,7 +53,7 @@
>  
>  /* OS specific PCI information structure and adapter information. */
>  struct crystalhd_adp {
> -     /* Hardware borad/PCI specifics */
> +     /* Hardware board/PCI specifics */
>       char                    name[32];
>       struct pci_dev          *pdev;
>  
> diff --git a/drivers/staging/crystalhd/crystalhd_misc.c 
> b/drivers/staging/crystalhd/crystalhd_misc.c
> index 51f6980..c3d0244 100644
> --- a/drivers/staging/crystalhd/crystalhd_misc.c
> +++ b/drivers/staging/crystalhd/crystalhd_misc.c
> @@ -389,7 +389,7 @@ void *bc_kern_dma_alloc(struct crystalhd_adp *adp, 
> uint32_t sz,
>       void *temp = NULL;
>  
>       if (!adp || !sz || !phy_addr) {
> -             BCMLOG_ERR("Invalide Arg..\n");
> +             BCMLOG_ERR("Invalid Arg..\n");
>               return temp;
>       }
>  
> @@ -415,7 +415,7 @@ void bc_kern_dma_free(struct crystalhd_adp *adp, uint32_t 
> sz, void *ka,
>                     dma_addr_t phy_addr)
>  {
>       if (!adp || !ka || !sz || !phy_addr) {
> -             BCMLOG_ERR("Invalide Arg..\n");
> +             BCMLOG_ERR("Invalid Arg..\n");
>               return;
>       }
>  
> diff --git a/drivers/staging/crystalhd/crystalhd_misc.h 
> b/drivers/staging/crystalhd/crystalhd_misc.h
> index aa736c8..77ab72a 100644
> --- a/drivers/staging/crystalhd/crystalhd_misc.h
> +++ b/drivers/staging/crystalhd/crystalhd_misc.h
> @@ -206,7 +206,7 @@ extern void crystalhd_show_buffer(uint32_t off, uint8_t 
> *buff,
>  enum _chd_log_levels {
>       BCMLOG_ERROR            = 0x80000000,   /* Don't disable this option */
>       BCMLOG_DATA             = 0x40000000,   /* Data, enable by default */
> -     BCMLOG_SPINLOCK         = 0x20000000,   /* Spcial case for Spin locks*/
> +     BCMLOG_SPINLOCK         = 0x20000000,   /* Special case for Spin locks*/
>  
>       /* Following are allowed only in debug mode */
>       BCMLOG_INFO             = 0x00000001,   /* Generic informational */
> 


-- 
~Randy
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