Signed-off-by: mark yao <yzq at rock-chips.com>
---
.../devicetree/bindings/video/rockchip-panel.txt | 52 ++++++++++++++++++++
1 file changed, 52 insertions(+)
create mode 100644 Documentation/devicetree/bindings/video/rockchip-panel.txt
diff --git a/Documentation/devicetree/bindings/video/rockchip-panel.txt
b/Documentation/devicetree/bindings/video/rockchip-panel.txt
new file mode 100644
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+++ b/Documentation/devicetree/bindings/video/rockchip-panel.txt
@@ -0,0 +1,52 @@
+Rockchip LCD Display interface
+================================
+Required properties:
+-compatible: "rockchip,rockchip-panel";
+
+- rockchip,output-face: lcdc display mode value should set as following
+ "r8g8b8": 24bit display port, R8 G8 B8
+ "r6g6b6": 18bit display port, R6 G6 B6
+ "r5g6b5": 16bit display port, R5 G6 B5
+
+Optional properties:
+- display-timings: timings for the connected panel as described by
+ Documentation/devicetree/bindings/video/display-timing.txt
+Optional properties:
+- rockchip,power-gpios: gpio to power on or off the LCD (as many as needed)
+- lcdc-vcc18: Defined if power supply of lcd controller is 1.8v,
+ Not defined if power supply of lcd controller is 3.3v.
+- output-dither: support dithering the output color.
+- color-swap-rb: swap R and B color per pixel.
+- color-swap-rg: swap R and G color per pixel.
+- color-swap-bg: swap B and G color per pixel.
+
+Example:
+ panel {
+ compatible = "rockchip,rockchip-panel";
+ rockchip,output-face = "r6g6b6";
+
+ enable-gpios = <&gpio7 3 GPIO_ACTIVE_HIGH
+ &gpio7 4 GPIO_ACTIVE_HIGH>;
+ output-dither;
+
+ display-timings {
+ native-mode = <&timing_disp0>;
+
+ timing_disp0: 1280x800 {
+ clock-frequency = <71000000>;
+ hactive = <1280>;
+ vactive = <800>;
+ hback-porch = <100>;
+ hfront-porch = <18>;
+ vback-porch = <8>;
+ vfront-porch = <6>;
+ hsync-len = <10>;
+ vsync-len = <2>;
+ hsync-active = <0>;
+ vsync-active = <0>;
+ de-active = <0>;
+ pixelclk-active = <0>;
+ };
+ };
+
+ };
--
1.7.9.5
