Also remove the duplicated oaktrail function.

Signed-off-by: Patrik Jakobsson <patrik.r.jakobsson at gmail.com>
---
 drivers/gpu/drm/gma500/cdv_intel_dp.c        |  3 ++-
 drivers/gpu/drm/gma500/mdfld_intel_display.c |  6 +++---
 drivers/gpu/drm/gma500/oaktrail_crtc.c       |  6 +++---
 drivers/gpu/drm/gma500/oaktrail_hdmi.c       | 12 +++---------
 drivers/gpu/drm/gma500/psb_intel_display.c   | 16 +++++-----------
 drivers/gpu/drm/gma500/psb_intel_drv.h       |  1 -
 drivers/gpu/drm/gma500/psb_intel_sdvo.c      |  2 +-
 7 files changed, 17 insertions(+), 29 deletions(-)

diff --git a/drivers/gpu/drm/gma500/cdv_intel_dp.c 
b/drivers/gpu/drm/gma500/cdv_intel_dp.c
index 88d9ef6..839ab83 100644
--- a/drivers/gpu/drm/gma500/cdv_intel_dp.c
+++ b/drivers/gpu/drm/gma500/cdv_intel_dp.c
@@ -34,6 +34,7 @@
 #include "psb_drv.h"
 #include "psb_intel_drv.h"
 #include "psb_intel_reg.h"
+#include "gma_display.h"
 #include <drm/drm_dp_helper.h>

 #define _wait_for(COND, MS, W) ({ \
@@ -1317,7 +1318,7 @@ cdv_intel_dp_start_link_train(struct psb_intel_encoder 
*encoder)
        /* Enable output, wait for it to become active */
        REG_WRITE(intel_dp->output_reg, reg);
        REG_READ(intel_dp->output_reg);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        DRM_DEBUG_KMS("Link config\n");
        /* Write the link configuration data */
diff --git a/drivers/gpu/drm/gma500/mdfld_intel_display.c 
b/drivers/gpu/drm/gma500/mdfld_intel_display.c
index aa6528d..da83fdd 100644
--- a/drivers/gpu/drm/gma500/mdfld_intel_display.c
+++ b/drivers/gpu/drm/gma500/mdfld_intel_display.c
@@ -65,7 +65,7 @@ void mdfldWaitForPipeDisable(struct drm_device *dev, int pipe)
        }

        /* FIXME JLIU7_PO */
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
        return;

        /* Wait for for the pipe disable to take effect. */
@@ -93,7 +93,7 @@ void mdfldWaitForPipeEnable(struct drm_device *dev, int pipe)
        }

        /* FIXME JLIU7_PO */
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);
        return;

        /* Wait for for the pipe enable to take effect. */
@@ -1034,7 +1034,7 @@ static int mdfld_crtc_mode_set(struct drm_crtc *crtc,

        /* Wait for for the pipe enable to take effect. */
        REG_WRITE(map->cntr, dev_priv->dspcntr[pipe]);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

 mrst_crtc_mode_set_exit:

diff --git a/drivers/gpu/drm/gma500/oaktrail_crtc.c 
b/drivers/gpu/drm/gma500/oaktrail_crtc.c
index 75567ee..8af461f 100644
--- a/drivers/gpu/drm/gma500/oaktrail_crtc.c
+++ b/drivers/gpu/drm/gma500/oaktrail_crtc.c
@@ -242,7 +242,7 @@ static void oaktrail_crtc_dpms(struct drm_crtc *crtc, int 
mode)
                        REG_READ(map->conf);
                }
                /* Wait for for the pipe disable to take effect. */
-               psb_intel_wait_for_vblank(dev);
+               gma_wait_for_vblank(dev);

                temp = REG_READ(map->dpll);
                if ((temp & DPLL_VCO_ENABLE) != 0) {
@@ -484,10 +484,10 @@ static int oaktrail_crtc_mode_set(struct drm_crtc *crtc,

        REG_WRITE(map->conf, pipeconf);
        REG_READ(map->conf);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        REG_WRITE(map->cntr, dspcntr);
-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

 oaktrail_crtc_mode_set_exit:
        gma_power_end(dev);
diff --git a/drivers/gpu/drm/gma500/oaktrail_hdmi.c 
b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
index f036f1f..d9013f7 100644
--- a/drivers/gpu/drm/gma500/oaktrail_hdmi.c
+++ b/drivers/gpu/drm/gma500/oaktrail_hdmi.c
@@ -155,12 +155,6 @@ static void oaktrail_hdmi_audio_disable(struct drm_device 
*dev)
        HDMI_READ(HDMI_HCR);
 }

-static void wait_for_vblank(struct drm_device *dev)
-{
-       /* Wait for 20ms, i.e. one cycle at 50hz. */
-       mdelay(20);
-}
-
 static unsigned int htotal_calculate(struct drm_display_mode *mode)
 {
        u32 htotal, new_crtc_htotal;
@@ -372,10 +366,10 @@ int oaktrail_crtc_hdmi_mode_set(struct drm_crtc *crtc,

        REG_WRITE(PCH_PIPEBCONF, pipeconf);
        REG_READ(PCH_PIPEBCONF);
-       wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        REG_WRITE(dspcntr_reg, dspcntr);
-       wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        gma_power_end(dev);

@@ -459,7 +453,7 @@ void oaktrail_crtc_hdmi_dpms(struct drm_crtc *crtc, int 
mode)
                        REG_READ(PCH_PIPEBCONF);
                }

-               wait_for_vblank(dev);
+               gma_wait_for_vblank(dev);

                /* Enable plane */
                temp = REG_READ(DSPBCNTR);
diff --git a/drivers/gpu/drm/gma500/psb_intel_display.c 
b/drivers/gpu/drm/gma500/psb_intel_display.c
index 89be7a3..fa57864 100644
--- a/drivers/gpu/drm/gma500/psb_intel_display.c
+++ b/drivers/gpu/drm/gma500/psb_intel_display.c
@@ -82,12 +82,6 @@ static void psb_intel_clock(int refclk, struct gma_clock_t 
*clock)
        clock->dot = clock->vco / clock->p;
 }

-void psb_intel_wait_for_vblank(struct drm_device *dev)
-{
-       /* Wait for 20ms, i.e. one cycle at 50hz. */
-       mdelay(20);
-}
-
 static int psb_intel_pipe_set_base(struct drm_crtc *crtc,
                            int x, int y, struct drm_framebuffer *old_fb)
 {
@@ -244,7 +238,7 @@ static void psb_intel_crtc_dpms(struct drm_crtc *crtc, int 
mode)
                }

                /* Wait for vblank for the disable to take effect. */
-               psb_intel_wait_for_vblank(dev);
+               gma_wait_for_vblank(dev);

                temp = REG_READ(map->dpll);
                if ((temp & DPLL_VCO_ENABLE) != 0) {
@@ -516,14 +510,14 @@ static int psb_intel_crtc_mode_set(struct drm_crtc *crtc,
        REG_WRITE(map->conf, pipeconf);
        REG_READ(map->conf);

-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        REG_WRITE(map->cntr, dspcntr);

        /* Flush the plane changes */
        crtc_funcs->mode_set_base(crtc, x, y, old_fb);

-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        return 0;
 }
@@ -669,12 +663,12 @@ static void psb_intel_crtc_restore(struct drm_crtc *crtc)
        REG_WRITE(map->base, crtc_state->saveDSPBASE);
        REG_WRITE(map->conf, crtc_state->savePIPECONF);

-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        REG_WRITE(map->cntr, crtc_state->saveDSPCNTR);
        REG_WRITE(map->base, crtc_state->saveDSPBASE);

-       psb_intel_wait_for_vblank(dev);
+       gma_wait_for_vblank(dev);

        paletteReg = map->palette;
        for (i = 0; i < 256; ++i)
diff --git a/drivers/gpu/drm/gma500/psb_intel_drv.h 
b/drivers/gpu/drm/gma500/psb_intel_drv.h
index bfe0408..5968502 100644
--- a/drivers/gpu/drm/gma500/psb_intel_drv.h
+++ b/drivers/gpu/drm/gma500/psb_intel_drv.h
@@ -246,7 +246,6 @@ extern struct drm_encoder *psb_intel_best_encoder(struct 
drm_connector

 extern struct drm_display_mode *psb_intel_crtc_mode_get(struct drm_device *dev,
                                                    struct drm_crtc *crtc);
-extern void psb_intel_wait_for_vblank(struct drm_device *dev);
 extern int psb_intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data,
                                struct drm_file *file_priv);
 extern struct drm_crtc *psb_intel_get_crtc_from_pipe(struct drm_device *dev,
diff --git a/drivers/gpu/drm/gma500/psb_intel_sdvo.c 
b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
index 19e3660..e3d1078 100644
--- a/drivers/gpu/drm/gma500/psb_intel_sdvo.c
+++ b/drivers/gpu/drm/gma500/psb_intel_sdvo.c
@@ -1121,7 +1121,7 @@ static void psb_intel_sdvo_dpms(struct drm_encoder 
*encoder, int mode)
                if ((temp & SDVO_ENABLE) == 0)
                        psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | 
SDVO_ENABLE);
                for (i = 0; i < 2; i++)
-                       psb_intel_wait_for_vblank(dev);
+                       gma_wait_for_vblank(dev);

                status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, 
&input1, &input2);
                /* Warn if the device reported failure to sync.
-- 
1.8.1.2

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