https://bugs.freedesktop.org/show_bug.cgi?id=66384
--- Comment #1 from Michel D?nzer <michel at daenzer.net> --- I think this is because the DRI2 MSC counters differ between CRTCs, so a DRI2 buffer swap or MSC wait times out. AFAICT it might be tricky to fix this, at least without DRI3. -- You are receiving this mail because: You are the assignee for the bug. -------------- next part -------------- An HTML attachment was scrubbed... URL: <http://lists.freedesktop.org/archives/dri-devel/attachments/20130712/a524cd71/attachment.html>
