On Wed, Feb 13, 2013 at 10:20:21PM +0100, Patrik Jakobsson wrote: > The Intel PRM says the M1 and M2 divisors must be in the range of 10-20 and > 5-9. > Since we do all calculations based on them being register values (which are > subtracted by 2) we need to specify them accordingly.
One thing I've just noticed is that intel_limits_i9xx_sdvo is reused by g4x, so I'll double check that in the morning unless someone beats me to it. -Chris -- Chris Wilson, Intel Open Source Technology Centre
