On Mon, Aug 13, 2012 at 09:34:45PM -0700, Keith Packard wrote: > This is left over from the old PLL sharing code and isn't useful now > that PLLs are shared when possible. > > Signed-off-by: Keith Packard <keithp at keithp.com> Queued for -next, thanks for the patch. I'll hold off a bit on the others until it's a bit clearer what's going on/wrong. -Daniel -- Daniel Vetter Mail: daniel at ffwll.ch Mobile: +41 (0)79 365 57 48
- [PATCH 0/7] drm/i915: IVB FDI B/C fixes and misc cleanups Keith Packard
- [PATCH 1/7] drm/i915: Allow VGA on CRTC 2 Keith Packard
- [PATCH 1/7] drm/i915: Allow VGA on CRTC 2 Daniel Vetter
- [PATCH 2/7] drm/i915: FDI B/C share 4 lanes on Ivybri... Keith Packard
- [Intel-gfx] [PATCH 2/7] drm/i915: FDI B/C share 4... Lespiau, Damien
- [Intel-gfx] [PATCH 2/7] drm/i915: FDI B/C sha... Keith Packard
- [Intel-gfx] [PATCH 2/7] drm/i915: FDI B/C... Lespiau, Damien
- [PATCH 3/7] drm/i915: Delay between FDI link training... Keith Packard
- [Intel-gfx] [PATCH 3/7] drm/i915: Delay between F... Lespiau, Damien
- [PATCH 4/7] drm/i915: Check display_bpc against max_f... Keith Packard
- [Intel-gfx] [PATCH 4/7] drm/i915: Check display_b... Lespiau, Damien
- [PATCH 5/7] drm/i915: Pipe-C only configurations woul... Keith Packard
- [Intel-gfx] [PATCH 5/7] drm/i915: Pipe-C only con... Lespiau, Damien