On Thu, 29 Oct 2026, Dmytro Malovanyi <[email protected]> wrote:
> nv50_sor_dp_watermark_sst() checks DP_ENHANCED_FRAME_CAP for the
> watermark calculation, but the actual enhanced framing enable is
> decided in nvkm, in nvkm_dp_train(), nvkm_uoutp_mthd_dp_sst() and
> r535_dp_train_target(), with its own copy of the check. Convert all of
> them so they keep agreeing with each other.
>
> dispnv50 uses drm_dp_enhanced_frame_cap(). nvkm does not include the
> drm helpers, so add nvkm_dp_enhanced_frame_cap() with the same rule.

Seems reasonable to me, but up to the nouveau maintainers.

Reviewed-by: Jani Nikula <[email protected]>

> Compile tested only, I don't have nvidia hardware.
>
> Signed-off-by: Dmytro Malovanyi <[email protected]>
> ---
>  drivers/gpu/drm/nouveau/dispnv50/disp.c               |  2 +-
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c         |  2 +-
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h         | 11 +++++++++++
>  drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c      |  2 +-
>  .../gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c    |  2 +-
>  5 files changed, 15 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/nouveau/dispnv50/disp.c 
> b/drivers/gpu/drm/nouveau/dispnv50/disp.c
> index e91130f93..f965d4811 100644
> --- a/drivers/gpu/drm/nouveau/dispnv50/disp.c
> +++ b/drivers/gpu/drm/nouveau/dispnv50/disp.c
> @@ -1607,7 +1607,7 @@ static bool
>  nv50_sor_dp_watermark_sst(struct nouveau_encoder *outp,
>                         struct nv50_head *head, struct nv50_head_atom *asyh)
>  {
> -     bool enhancedFraming = outp->dp.dpcd[DP_MAX_LANE_COUNT] & 
> DP_ENHANCED_FRAME_CAP;
> +     bool enhancedFraming = drm_dp_enhanced_frame_cap(outp->dp.dpcd);
>       u64 minRate = outp->dp.link_bw * 1000;
>       unsigned tuSize = 64;
>       unsigned waterMark;
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c 
> b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
> index a109348bd..fbd9935f4 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.c
> @@ -509,7 +509,7 @@ nvkm_dp_train(struct nvkm_outp *outp, bool retrain)
>       OUTP_DBG(outp, "training");
>  
>       ior->dp.mst = outp->dp.lt.mst;
> -     ior->dp.ef = outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP;
> +     ior->dp.ef = nvkm_dp_enhanced_frame_cap(outp->dp.dpcd);
>       ior->dp.bw = outp->dp.lt.bw;
>       ior->dp.nr = outp->dp.lt.nr;
>  
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h 
> b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h
> index 9a6be4391..e56acc162 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dp.h
> @@ -23,6 +23,17 @@ void nvkm_dp_enable(struct nvkm_outp *, bool auxpwr);
>  #define DPCD_RC10_SUPPORTED_LINK_RATES(i)                               
> 0x00010
>  #define DPCD_RC10_SUPPORTED_LINK_RATES__SIZE                                 
> 16
>  
> +/* Same rule as drm_dp_enhanced_frame_cap() */
> +static inline bool
> +nvkm_dp_enhanced_frame_cap(const u8 *dpcd)
> +{
> +     if (dpcd[DPCD_RC00_DPCD_REV] >= 0x12)
> +             return true;
> +
> +     return dpcd[DPCD_RC00_DPCD_REV] >= 0x11 &&
> +            (dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP);
> +}
> +
>  /* DPCD Link Configuration */
>  #define DPCD_LC00_LINK_BW_SET                                           
> 0x00100
>  #define DPCD_LC01                                                       
> 0x00101
> diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c 
> b/drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
> index 377d0e0ce..b0158fc30 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/engine/disp/uoutp.c
> @@ -87,7 +87,7 @@ nvkm_uoutp_mthd_dp_sst(struct nvkm_outp *outp, void *argv, 
> u32 argc)
>               return 0;
>  
>       return ior->func->dp->sst(ior, args->v0.head,
> -                               outp->dp.dpcd[DPCD_RC02] & 
> DPCD_RC02_ENHANCED_FRAME_CAP,
> +                               nvkm_dp_enhanced_frame_cap(outp->dp.dpcd),
>                                 args->v0.watermark, args->v0.hblanksym, 
> args->v0.vblanksym);
>  }
>  
> diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c 
> b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
> index f5f22173f..c62900320 100644
> --- a/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
> +++ b/drivers/gpu/drm/nouveau/nvkm/subdev/gsp/rm/r535/disp.c
> @@ -972,7 +972,7 @@ r535_dp_train_target(struct nvkm_outp *outp, u8 target, 
> bool mst, u8 link_nr, u8
>       if (mst)
>               cmd |= NVDEF(NV0073_CTRL, DP_CMD, SET_FORMAT_MODE, 
> MULTI_STREAM);
>  
> -     if (outp->dp.dpcd[DPCD_RC02] & DPCD_RC02_ENHANCED_FRAME_CAP)
> +     if (nvkm_dp_enhanced_frame_cap(outp->dp.dpcd))
>               cmd |= NVDEF(NV0073_CTRL, DP_CMD, SET_ENHANCED_FRAMING, TRUE);
>  
>       if (target == 0 &&

-- 
Jani Nikula, Intel

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