On Mon, Oct 19, 2026 at 11:05:08PM -0300, Fabricio Akio wrote: > On SDM630, SDM660 and MSM8998 the GPU's GX power domain belongs to its > SMMU, not to the GPU, so GX switches off only once the SMMU suspends as > well. A GPU resumed with GX still on keeps its state, and the CP keeps > its ringbuffer read pointer. a5xx_hw_init() then rewinds the ringbuffer > and writes CP_ME_INIT at its start, while the CP goes on from its old > position, executes stale ringbuffer contents and hangs: > > timeout waiting to drain ringbuffer 0 rptr/wptr = 23/C > > Soft reset the GPU in a5xx_pm_resume() once it is powered, so that > every resume starts from the reset state. The downstream driver resets > only when it finds the GPU's power left on; resetting a GPU that was > powered off changes nothing, and on A508 the reset takes about 2 us of > a resume of about 1.5 ms, so do it every time. > > The reset also clears the busy counter, which msm_gpu_pm_resume() has > just sampled as devfreq's baseline. Take the baseline again after the > reset, or the next devfreq poll subtracts the old count from the new > one, wraps, and sets the GPU to its top frequency. > > Signed-off-by: Fabricio Akio <[email protected]> > --- > Changes in v2: > - Take devfreq's busy-cycle baseline again after the reset, which > clears the busy counter (Sashiko) > > Tested on A508 only; the reset runs on every A5xx. > > A stall with the same signature, the CP's read pointer past the write > pointer just after CP_ME_INIT, was reported on an A509: > https://lore.kernel.org/linux-arm-msm/20260308-adreno-ringbuffer-drain-timeout-recovery-v1-1-985a33faf...@postmarketos.org/ > This may be the root cause of the A509 stall Paul Sajna reported there. > --- > drivers/gpu/drm/msm/adreno/a5xx_gpu.c | 15 +++++++++++++++ > drivers/gpu/drm/msm/msm_gpu.h | 1 + > drivers/gpu/drm/msm/msm_gpu_devfreq.c | 17 +++++++++++++++++ > 3 files changed, 33 insertions(+) >
This matches the issue I had on MSM8998. For now it's: Reviewed-by: Dmitry Baryshkov <[email protected]> I'll update this with the T-B once the board is free from the previous set of tests. -- With best wishes Dmitry
