On Tue, Oct 20, 2026 at 11:09:12AM +0800, Damon Ding wrote: > Document the eDP transmitter PHY with NaNeng IP block found on the > RK3568 SoC. The PHY is controlled through the eDP PHY GRF registers, > so its node is modeled as a child of the eDP PHY GRF syscon. Also > add the "rockchip,rk3568-edp-phy-grf" compatible and the "edp-phy" > child node reference to the Rockchip GRF schema. > > Signed-off-by: Damon Ding <[email protected]> > --- > .../bindings/phy/rockchip,rk3568-edp-phy.yaml | 59 +++++++++++++++++++ > .../devicetree/bindings/soc/rockchip/grf.yaml | 15 +++++ > 2 files changed, 74 insertions(+) > create mode 100644 > Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml > > diff --git > a/Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml > b/Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml > new file mode 100644 > index 000000000000..afe7bc3d839e > --- /dev/null > +++ b/Documentation/devicetree/bindings/phy/rockchip,rk3568-edp-phy.yaml > @@ -0,0 +1,59 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/phy/rockchip,rk3568-edp-phy.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Rockchip eDP Transmitter PHY with NaNeng IP block > + > +maintainers: > + - Damon Ding <[email protected]> > + - Heiko Stuebner <[email protected]> > + > +description: > + On the RK3568 SoC the eDP PHY is controlled through the eDP PHY GRF > + registers, therefore the PHY node is expected to be a child of the > + eDP PHY GRF syscon node.
>From the driver, looks like there is a specific register range for the phy regs in the GRF, so please add a 'reg' entry (and 'ranges' in the parent). Rob
