On Qualcomm platforms using the Display Co-Processor (DCP), the display
hardware is owned and programmed by firmware. Linux does not access
the display controller, DSI controller, DSI PHY, display clocks, or other
display pipeline registers.
The display pipeline must nevertheless be exposed through the DRM/KMS
interfaces so userspace can perform modesetting, framebuffer updates,
panel control, and page flips.
This series adds a DCP KMS backend to MSM DRM, representing the
firmware-owned pipeline and translating DRM operations into HFI commands.
DCP communicates with Linux over VirtIO and uses the HFI protocol for
command and response handling, capability discovery, and
display events.
This series adds:
- Device-tree bindings for the DCP VirtIO-MMIO function, IOVA
range, separate transport and framebuffer IOMMU contexts, IPCC power
notification, interrupts, and the external DSI display graph.
- HFI protocol definitions and packet helpers for capability discovery,
modesetting, plane and CRTC configuration, DSI, and panel control.
- VirtIO transport with command and response queues. HFI command, response,
and capability buffers are allocated through the DMA API in the address
space visible to DCP firmware.
- Synchronous command tracking, asynchronous response dispatch, timeout
handling, and queue teardown synchronization for safe device removal.
- Capability discovery for displays, CRTCs, mixers, VIG and DMA pipes,
DSI interfaces, and panel resources.
- DRM planes and CRTCs using the standard atomic-state model. DRM state is
translated into HFI properties for layer configuration and mixer
limits, bandwidth and clock properties, frame sequencing, and triggering.
- An MSM KMS backend, DCP encoder, and DSI bridge. The backend reuses
the existing MSM DRM device, GEM and framebuffer handling, atomic commit
infrastructure, encoder, bridge, and connector support.
- Asynchronous VSYNC, frame-scan completion, and error events propagated to
DRM for vblank and page-flip completion.
- IPCC power notifications wake DCP firmware and coordinate HFI queue
activity across firmware power transitions.
DCP is integrated as an MSM KMS backend rather than a separate DRM device.
This preserves the userspace-visible MSM DRM device and allows Linux
to retain normal DRM/KMS semantics while display hardware remains owned by
firmware.
The initial implementation supports the DSI output described below and uses
resources reported by firmware. Split-pipe, multirect, cursor-pipe,
partial-update, DisplayPort, and writeback support are deferred.
Tested on the Qualcomm Hawi MTP with an NT37801 DSC command-mode panel:
- Display console at 1440x3200.
- Panel initialization and DCS transfers complete successfully.
Device Tree Topology
====================
qcom,dcp-virtio
VirtIO-MMIO host
├── iommus VirtIO/HFI DMA context
├── iommu-ranges IOVA window
├── interrupts VirtIO + power notification
├── mboxes dcp-power-tx
└── dcp-subsystem
├── compatible virtio,device34
├── iommus framebuffer DMA context
├── port@1 DCP INTF1
│ └── endpoint ────────────┐
└── dsi@0 │
├── port@0 ◄─────────────┘
└── port@1 DSI output
Runtime Architecture
====================
Linux DRM/KMS
├── planes, CRTCs, connector, encoder, DSI bridge
├── atomic state and framebuffer handling
└── DCP VirtIO device driver
|
v
Upstream VirtIO-MMIO transport
|
v
DCP HFI protocol
├── capability and resource discovery
├── commands and responses
└── VSYNC, frame-done, and error events
|
+------+-------+
| |
v v
cmd/resp queues IPCC mailbox
HFI buffers power notification
| |
+------+-------+
|
v
DCP firmware
├── display pipeline and VIG/DMA pipes
├── DSI PHY and controller
└── display clocks and resource handling
Dependencies
============
The DT changes depend on the following series:
- VPU IOMMU IOVA handling:
https://lore.kernel.org/all/20260926-vpu_iommu_iova_handling-v5-4-0322ca5dc...@oss.qualcomm.com/
- Hawi device-tree support:
https://lore.kernel.org/all/[email protected]/
https://lore.kernel.org/all/[email protected]/
The VPU IOMMU series provides the IOVA handling required by the DCP VirtIO
transport. The Hawi DT series provides the platform nodes and IOMMU
descriptions consumed by this series.
Signed-off-by: Jayant Shekhar <[email protected]>
Assisted-by: LLM
---
Jayant Shekhar (13):
dt-bindings: display: msm: Add Qualcomm DCP bindings
drm/msm/dcp: Add HFI protocol definitions
drm/msm/dcp: Add HFI transport over VirtIO
drm/msm/dcp: Add IPCC power notification
drm/msm/dcp: Add HFI display command implementations
drm/msm/dcp: Add planes, CRTCs, and HFI event routing
drm/msm/dcp: Add DCP encoder
drm/msm/dcp: Add DSI bridge
drm/msm/dcp: Register DCP display pipeline
drm/msm/dcp: Add VirtIO transport and platform driver
drm/msm: Support KMS backends without a display IRQ
drm/msm: Register the DCP backend
arm64: dts: qcom: hawi: Add DCP support
.../bindings/display/msm/qcom,dcp-dsi.yaml | 75 ++
.../bindings/display/msm/qcom,dcp-virtio.yaml | 113 ++
.../devicetree/bindings/display/msm/qcom,dcp.yaml | 119 ++
arch/arm64/boot/dts/qcom/hawi-mtp.dts | 131 ++-
arch/arm64/boot/dts/qcom/hawi.dtsi | 59 +
drivers/gpu/drm/msm/Kconfig | 25 +
drivers/gpu/drm/msm/Makefile | 21 +
drivers/gpu/drm/msm/dcp/dcp_crtc.c | 747 ++++++++++++
drivers/gpu/drm/msm/dcp/dcp_crtc.h | 104 ++
drivers/gpu/drm/msm/dcp/dcp_dpu_kms.c | 659 +++++++++++
drivers/gpu/drm/msm/dcp/dcp_dpu_kms.h | 51 +
drivers/gpu/drm/msm/dcp/dcp_drv.c | 245 ++++
drivers/gpu/drm/msm/dcp/dcp_drv.h | 50 +
drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.c | 1140 ++++++++++++++++++
drivers/gpu/drm/msm/dcp/dcp_dsi_bridge.h | 69 ++
drivers/gpu/drm/msm/dcp/dcp_dsi_panel.h | 77 ++
drivers/gpu/drm/msm/dcp/dcp_encoder.c | 31 +
drivers/gpu/drm/msm/dcp/dcp_encoder.h | 16 +
drivers/gpu/drm/msm/dcp/dcp_hfi.h | 273 +++++
drivers/gpu/drm/msm/dcp/dcp_hfi_core.c | 1219 ++++++++++++++++++++
drivers/gpu/drm/msm/dcp/dcp_hfi_crtc.c | 191 +++
drivers/gpu/drm/msm/dcp/dcp_hfi_dsi.c | 253 ++++
drivers/gpu/drm/msm/dcp/dcp_hfi_dsi_panel.c | 601 ++++++++++
drivers/gpu/drm/msm/dcp/dcp_hfi_encoder.c | 64 +
drivers/gpu/drm/msm/dcp/dcp_hfi_kms.c | 451 ++++++++
drivers/gpu/drm/msm/dcp/dcp_hfi_plane.c | 64 +
drivers/gpu/drm/msm/dcp/dcp_hfi_priv.h | 74 ++
drivers/gpu/drm/msm/dcp/dcp_ipcc.c | 212 ++++
drivers/gpu/drm/msm/dcp/dcp_ipcc.h | 56 +
drivers/gpu/drm/msm/dcp/dcp_plane.c | 1077 +++++++++++++++++
drivers/gpu/drm/msm/dcp/dcp_plane.h | 61 +
drivers/gpu/drm/msm/dcp/dcp_virtio.c | 302 +++++
drivers/gpu/drm/msm/dcp/dcp_virtio.h | 22 +
drivers/gpu/drm/msm/dcp/hfi/hfi_commands_device.h | 78 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_commands_display.h | 105 ++
.../drm/msm/dcp/hfi/hfi_commands_display_events.h | 90 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_commands_panel.h | 27 +
drivers/gpu/drm/msm/dcp/hfi/hfi_defs_common.h | 182 +++
drivers/gpu/drm/msm/dcp/hfi/hfi_defs_device.h | 61 +
drivers/gpu/drm/msm/dcp/hfi/hfi_defs_display.h | 464 ++++++++
.../gpu/drm/msm/dcp/hfi/hfi_defs_display_color.h | 247 ++++
drivers/gpu/drm/msm/dcp/hfi/hfi_defs_panel.h | 287 +++++
.../gpu/drm/msm/dcp/hfi/hfi_pack_unpack_common.h | 79 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_packer.c | 106 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_packer.h | 65 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_packet.h | 76 ++
.../gpu/drm/msm/dcp/hfi/hfi_properties_device.h | 102 ++
.../gpu/drm/msm/dcp/hfi/hfi_properties_display.h | 480 ++++++++
drivers/gpu/drm/msm/dcp/hfi/hfi_properties_panel.h | 198 ++++
drivers/gpu/drm/msm/dcp/hfi/hfi_unpacker.c | 157 +++
drivers/gpu/drm/msm/dcp/hfi/hfi_unpacker.h | 77 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_utils.c | 79 ++
drivers/gpu/drm/msm/dcp/hfi/hfi_utils.h | 56 +
drivers/gpu/drm/msm/msm_drv.c | 2 +
drivers/gpu/drm/msm/msm_drv.h | 8 +
drivers/gpu/drm/msm/msm_kms.c | 2 +-
56 files changed, 11678 insertions(+), 2 deletions(-)
---
base-commit: 08d7e5910b32af25b08b1b16ff89883a38908c72
change-id: 20261014-jshekhar-drm-msm-dcp-v1-cb2b2ad9485b
Best regards,
--
Jayant Shekhar <[email protected]>
