On Tue, 15 Sep 2026, Animesh Manna <[email protected]> wrote: > Issue a AUX write transaction to DPCD DP_TOTAL_LTTPR_CNT (0xf000a) > with total number of LTTPR before link training. > > v2: Cosmetic changes. [Suraj] > v3: > - Use same encoding format for lttpr_count. [Jouni] > - Avoid reading alpm_ctl2 register. [Jouni] > > Cc: Jouni Högander <[email protected]> > Signed-off-by: Animesh Manna <[email protected]> > --- > drivers/gpu/drm/i915/display/intel_alpm.c | 7 ++++++- > .../drm/i915/display/intel_dp_link_training.c | 21 +++++++++++++++++++ > 2 files changed, 27 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c > b/drivers/gpu/drm/i915/display/intel_alpm.c > index da653a407e97..06c1a59aa2c5 100644 > --- a/drivers/gpu/drm/i915/display/intel_alpm.c > +++ b/drivers/gpu/drm/i915/display/intel_alpm.c > @@ -726,7 +726,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, > { > struct intel_display *display = to_intel_display(intel_dp); > enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; > - u32 alpm_ctl; > + u32 alpm_ctl, alpm_ctl2, lttpr_count; > > if (DISPLAY_VER(display) < 20 || (!intel_psr_needs_alpm(intel_dp, > crtc_state) && > !crtc_state->has_lobf)) > @@ -762,6 +762,11 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, > > alpm_ctl |= > ALPM_CTL_ALPM_ENTRY_CHECK(crtc_state->alpm_state.check_entry_lines); > > + lttpr_count = drm_dp_lttpr_count(intel_dp->lttpr_common_caps); > + > + alpm_ctl2 = ALPM_CTL2_NUMBER_OF_LTTPR(lttpr_count); > + > + intel_de_write(display, ALPM_CTL2(display, cpu_transcoder), alpm_ctl2); > intel_de_write(display, ALPM_CTL(display, cpu_transcoder), alpm_ctl); > mutex_unlock(&intel_dp->alpm.lock); > } > diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > index cb92cff90614..37c8306a1fa0 100644 > --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c > +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c > @@ -2265,6 +2265,25 @@ intel_dp_128b132b_link_train(struct intel_dp *intel_dp, > return passed; > } > > +static void intel_dp_update_lttpr_count(struct intel_dp *intel_dp, > + int lttpr_count) > +{ > + u8 val; > + > + /* > + * Program only for DP2.1 and return if LTTPR revison is less than 0x20 > + * where 0:3 represents minor rev and 4:7 represent major rev > + */ > + if (!intel_dp_is_edp(intel_dp) || > + lttpr_count < 0 || > + intel_dp->lttpr_common_caps[0] <= 0x20) > + return; > + > + val = intel_dp->lttpr_common_caps[DP_PHY_REPEATER_CNT - > + > DP_LT_TUNABLE_PHY_REPEATER_FIELD_DATA_STRUCTURE_REV]; > + drm_dp_dpcd_writeb(&intel_dp->aux, DP_TOTAL_LTTPR_CNT, val);
Please use the modern DPCD accessors throughout the series. See [1]. BR, Jani. [1] https://lore.kernel.org/r/[email protected] > +} > + > /** > * intel_dp_start_link_train - start link training > * @state: Atomic state > @@ -2304,6 +2323,8 @@ void intel_dp_start_link_train(struct > intel_atomic_state *state, > > intel_dp_prepare_link_train(intel_dp, crtc_state); > > + intel_dp_update_lttpr_count(intel_dp, lttpr_count); > + > if (intel_dp_is_uhbr(crtc_state)) > passed = intel_dp_128b132b_link_train(intel_dp, crtc_state, > lttpr_count); > else -- Jani Nikula, Intel
