Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Low] drm/i915: missing vrr prefix for cmrr access in intel_dp_needs_as_sdp() --
commit d1eecbeb3255f083df2a9a20caa676b6bc9c6e5e Author: Xizhe Tang <[email protected]> drm/i915/dp: Only send AS SDP when VRR/CMRR is enabled or PR !async This commit modifies the Adaptive-Sync SDP terminal condition to gate on VRR or CMRR enablement. This change resolves vertically streaked visuals during the first modeset at boot on fixed refresh rate eDP panels. Link: https://gitlab.freedesktop.org/drm/xe/kernel/-/work_items/9252 > diff --git a/drivers/gpu/drm/i915/display/intel_dp.c > b/drivers/gpu/drm/i915/display/intel_dp.c > --- a/drivers/gpu/drm/i915/display/intel_dp.c > +++ b/drivers/gpu/drm/i915/display/intel_dp.c > @@ -3111,7 +3111,8 @@ static bool intel_dp_needs_as_sdp(struct intel_dp > *intel_dp, > !intel_psr_pr_async_video_timing_supported(intel_dp)) > return true; > > - return intel_vrr_possible(crtc_state); > + return crtc_state->vrr.enable || > + crtc_state->cmrr.enable; [Severity: Low] Will this cause a build failure when compiling intel_dp.c? Looking at the intel_crtc_state structure in intel_dp_needs_as_sdp(), cmrr is nested inside the vrr substructure, not directly under crtc_state. Should this be accessed as crtc_state->vrr.cmrr.enable instead, similar to how it is safely accessed slightly later in intel_dp_compute_as_sdp()? > } -- Sashiko AI review · https://sashiko.dev/#/patchset/[email protected]?part=1
