On Thu, 2026-09-17 at 11:02 -0300, Jason Gunthorpe wrote: > On Thu, Sep 17, 2026 at 03:56:12PM +0200, Thomas Hellström wrote: > > > That is, a flag to tell the topology check that some transactions > > *will* take the host-bridge path due to IOVA being used, and that > > the > > computations including pci_p2pdma_distance() need to check whether > > that > > is possible (checking whitelist etc.) and return the corresponding > > THRU_HOST_BRIDGE mapping type. Translated transactions taking a > > short- > > cut using the bus-address would then be hidden from the driver. > > I imagined it would work by the driver passing in what modes it > supports and Intel GPU would simply pass in ATS only. > > Even something like mlx has variation, only some operations can opt > into ATS, many others are never-ATS. > > Driver should not make statements like " *will* take the host-bridge > path" since it has no idea.
Yes, agreed, but anyway DMA-BUF would then, as part of the dynamic_attach negotiation have an interface that takes an ATS only flag and use it to determine whether P2P is possible at all, and use them at mapping time to set up the correct SG list (IOVA or BUS address). Similarly the dma_map_page() needs to know these flags for p2pdma pages so that it never sets up a BUS_ADDRESS to an ATS-enabled device that didn't explicitly ask for it? And this all (and in addition the previous discussion around pcie subsystems calls from within dma-buf, and data-types for mapping information) makes me think that abstracting fast dma-buf interconnects along with our previous discussions is a good thing. Then interconnect details and cross-subsystem dependencies can be hidden in the interconnect implementations, suitably placed in the tree. Thanks, Thomas > > Jason
