The hardware is programmed with clipped source and destination dimensions,
but the framebuffer address is calculated using drm_fb_dma_get_gem_addr(),
which uses the full source dimensions. This will not match the source
offset if the top and/or left sides are clipped.
Switch to the new drm_fb_dma_get_gem_clipped_addr(), which provides the
buffer address starting at the clipped boundary.
Fixes: 711a3b878366 ("drm/imx: Add i.MX8qxp Display Controller KMS")
Cc: <[email protected]> # Needs drm_fb_dma_get_gem_clipped_addr()
Signed-off-by: Chen-Yu Tsai <[email protected]>
---
drivers/gpu/drm/imx/dc/dc-plane.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/imx/dc/dc-plane.c
b/drivers/gpu/drm/imx/dc/dc-plane.c
index 62dd0576fadc..35eb5039f5ac 100644
--- a/drivers/gpu/drm/imx/dc/dc-plane.c
+++ b/drivers/gpu/drm/imx/dc/dc-plane.c
@@ -65,7 +65,7 @@ static int dc_plane_check_max_source_resolution(struct
drm_plane_state *state)
static int dc_plane_check_fb(struct drm_plane_state *state)
{
struct drm_framebuffer *fb = state->fb;
- dma_addr_t baseaddr = drm_fb_dma_get_gem_addr(fb, state, 0);
+ dma_addr_t baseaddr = drm_fb_dma_get_gem_clipped_addr(fb, state, 0);
/* base address alignment */
if (baseaddr & 0x3) {
@@ -146,7 +146,7 @@ dc_plane_atomic_update(struct drm_plane *plane, struct
drm_atomic_commit *state)
src_w = drm_rect_width(&new_state->src) >> 16;
src_h = drm_rect_height(&new_state->src) >> 16;
- baseaddr = drm_fb_dma_get_gem_addr(fb, new_state, 0);
+ baseaddr = drm_fb_dma_get_gem_clipped_addr(fb, new_state, 0);
fu_ops = dc_fu_get_ops(dplane->fu);
--
2.55.0.1032.g73a4cd73de-goog
