From: Tomasz Rusinowicz <[email protected]> Use the vdev->timeout structure for register poll timeouts. This allows adjusting those timeouts depending on the platform type. For FPGA set MMU timeouts to 10x.
Signed-off-by: Tomasz Rusinowicz <[email protected]> Signed-off-by: Karol Wachowski <[email protected]> --- Changes in v2: - Add Singed-off-by: Karol Wachowski - Link to v1: https://lore.kernel.org/dri-devel/[email protected]/T/#u --- drivers/accel/ivpu/ivpu_drv.h | 3 +++ drivers/accel/ivpu/ivpu_hw.c | 20 ++++++++++++++++++++ drivers/accel/ivpu/ivpu_hw_ip.c | 6 ++---- drivers/accel/ivpu/ivpu_mmu.c | 12 ++++-------- 4 files changed, 29 insertions(+), 12 deletions(-) diff --git a/drivers/accel/ivpu/ivpu_drv.h b/drivers/accel/ivpu/ivpu_drv.h index 37d5a6ac55f8..8762b8969d96 100644 --- a/drivers/accel/ivpu/ivpu_drv.h +++ b/drivers/accel/ivpu/ivpu_drv.h @@ -186,6 +186,9 @@ struct ivpu_device { int autosuspend; int d0i3_entry_msg; int state_dump_msg; + int mmu_reg; + int mmu_queue; + int pwr_island_status; } timeout; }; diff --git a/drivers/accel/ivpu/ivpu_hw.c b/drivers/accel/ivpu/ivpu_hw.c index 647dc045c231..613bcdbc364c 100644 --- a/drivers/accel/ivpu/ivpu_hw.c +++ b/drivers/accel/ivpu/ivpu_hw.c @@ -99,13 +99,19 @@ static void wa_init(struct ivpu_device *vdev) static void timeouts_init(struct ivpu_device *vdev) { if (ivpu_test_mode & IVPU_TEST_MODE_DISABLE_TIMEOUTS) { + /* in milliseconds */ vdev->timeout.boot = -1; vdev->timeout.jsm = -1; vdev->timeout.tdr = -1; vdev->timeout.inference = -1; vdev->timeout.autosuspend = -1; vdev->timeout.d0i3_entry_msg = -1; + /* in microseconds */ + vdev->timeout.mmu_reg = -1; + vdev->timeout.mmu_queue = -1; + vdev->timeout.pwr_island_status = -1; } else if (ivpu_is_fpga(vdev)) { + /* in milliseconds */ vdev->timeout.boot = 50; vdev->timeout.jsm = 15000; vdev->timeout.tdr = 30000; @@ -113,7 +119,12 @@ static void timeouts_init(struct ivpu_device *vdev) vdev->timeout.autosuspend = -1; vdev->timeout.d0i3_entry_msg = 500; vdev->timeout.state_dump_msg = 10000; + /* in microseconds */ + vdev->timeout.mmu_reg = 100 * USEC_PER_MSEC; + vdev->timeout.mmu_queue = 1000 * USEC_PER_MSEC; + vdev->timeout.pwr_island_status = 5 * USEC_PER_MSEC; } else if (ivpu_is_simics(vdev)) { + /* in milliseconds */ vdev->timeout.boot = 50; vdev->timeout.jsm = 500; vdev->timeout.tdr = 10000; @@ -121,7 +132,12 @@ static void timeouts_init(struct ivpu_device *vdev) vdev->timeout.autosuspend = 100; vdev->timeout.d0i3_entry_msg = 100; vdev->timeout.state_dump_msg = 10; + /* in microseconds */ + vdev->timeout.mmu_reg = 10 * USEC_PER_MSEC; + vdev->timeout.mmu_queue = 100 * USEC_PER_MSEC; + vdev->timeout.pwr_island_status = 5 * USEC_PER_MSEC; } else { + /* in milliseconds */ vdev->timeout.boot = 1000; vdev->timeout.jsm = 500; vdev->timeout.tdr = 2000; @@ -132,6 +148,10 @@ static void timeouts_init(struct ivpu_device *vdev) vdev->timeout.autosuspend = 100; vdev->timeout.d0i3_entry_msg = 5; vdev->timeout.state_dump_msg = 100; + /* in microseconds */ + vdev->timeout.mmu_reg = 10 * USEC_PER_MSEC; + vdev->timeout.mmu_queue = 100 * USEC_PER_MSEC; + vdev->timeout.pwr_island_status = 5 * USEC_PER_MSEC; } } diff --git a/drivers/accel/ivpu/ivpu_hw_ip.c b/drivers/accel/ivpu/ivpu_hw_ip.c index 81f0b1f8f5a6..46661fbf9d05 100644 --- a/drivers/accel/ivpu/ivpu_hw_ip.c +++ b/drivers/accel/ivpu/ivpu_hw_ip.c @@ -15,8 +15,6 @@ #include "ivpu_mmu.h" #include "ivpu_pm.h" -#define PWR_ISLAND_STATUS_TIMEOUT_US (5 * USEC_PER_MSEC) - #define TIM_SAFE_ENABLE 0xf1d0dead #define TIM_WATCHDOG_RESET_VALUE 0xffffffff @@ -350,10 +348,10 @@ static int wait_for_pwr_island_status(struct ivpu_device *vdev, u32 exp_val) if (ivpu_hw_ip_gen(vdev) == IVPU_HW_IP_37XX) return REGV_POLL_FLD(VPU_37XX_HOST_SS_AON_PWR_ISLAND_STATUS0, MSS_CPU, exp_val, - PWR_ISLAND_STATUS_TIMEOUT_US); + vdev->timeout.pwr_island_status); else return REGV_POLL_FLD(VPU_40XX_HOST_SS_AON_PWR_ISLAND_STATUS0, CSS_CPU, exp_val, - PWR_ISLAND_STATUS_TIMEOUT_US); + vdev->timeout.pwr_island_status); } static void pwr_island_isolation_drive_37xx(struct ivpu_device *vdev, bool enable) diff --git a/drivers/accel/ivpu/ivpu_mmu.c b/drivers/accel/ivpu/ivpu_mmu.c index b2025274f91d..c846499d96ce 100644 --- a/drivers/accel/ivpu/ivpu_mmu.c +++ b/drivers/accel/ivpu/ivpu_mmu.c @@ -220,9 +220,6 @@ #define IVPU_MMU_STE_1_S1DSS GENMASK_ULL(1, 0) #define IVPU_MMU_STE_1_S1DSS_TERMINATE 0x0 -#define IVPU_MMU_REG_TIMEOUT_US (10 * USEC_PER_MSEC) -#define IVPU_MMU_QUEUE_TIMEOUT_US (100 * USEC_PER_MSEC) - #define IVPU_MMU_GERROR_ERR_MASK ((REG_FLD(IVPU_MMU_REG_GERROR, CMDQ)) | \ (REG_FLD(IVPU_MMU_REG_GERROR, EVTQ_ABT)) | \ (REG_FLD(IVPU_MMU_REG_GERROR, PRIQ_ABT)) | \ @@ -438,14 +435,14 @@ static int ivpu_mmu_reg_write_cr0(struct ivpu_device *vdev, u32 val) { REGV_WR32(IVPU_MMU_REG_CR0, val); - return REGV_POLL_FLD(IVPU_MMU_REG_CR0ACK, VAL, val, IVPU_MMU_REG_TIMEOUT_US); + return REGV_POLL_FLD(IVPU_MMU_REG_CR0ACK, VAL, val, vdev->timeout.mmu_reg); } static int ivpu_mmu_reg_write_irq_ctrl(struct ivpu_device *vdev, u32 val) { REGV_WR32(IVPU_MMU_REG_IRQ_CTRL, val); - return REGV_POLL_FLD(IVPU_MMU_REG_IRQ_CTRLACK, VAL, val, IVPU_MMU_REG_TIMEOUT_US); + return REGV_POLL_FLD(IVPU_MMU_REG_IRQ_CTRLACK, VAL, val, vdev->timeout.mmu_reg); } static int ivpu_mmu_irqs_setup(struct ivpu_device *vdev) @@ -465,8 +462,7 @@ static int ivpu_mmu_cmdq_wait_for_cons(struct ivpu_device *vdev) struct ivpu_mmu_queue *cmdq = &vdev->mmu->cmdq; int ret; - ret = REGV_POLL_FLD(IVPU_MMU_REG_CMDQ_CONS, VAL, cmdq->prod, - IVPU_MMU_QUEUE_TIMEOUT_US); + ret = REGV_POLL_FLD(IVPU_MMU_REG_CMDQ_CONS, VAL, cmdq->prod, vdev->timeout.mmu_queue); if (ret) return ret; @@ -880,7 +876,7 @@ static int ivpu_mmu_evtq_set(struct ivpu_device *vdev, bool enable) val = REG_CLR_FLD(IVPU_MMU_REG_CR0, EVTQEN, val); REGV_WR32(IVPU_MMU_REG_CR0, val); - return REGV_POLL_FLD(IVPU_MMU_REG_CR0ACK, VAL, val, IVPU_MMU_REG_TIMEOUT_US); + return REGV_POLL_FLD(IVPU_MMU_REG_CR0ACK, VAL, val, vdev->timeout.mmu_reg); } static int ivpu_mmu_evtq_enable(struct ivpu_device *vdev) -- 2.43.0
