Thank you for your contribution! Sashiko AI review found 1 potential issue(s) to consider: - [Medium] Unconditional execution of CABC off sequence overwrites untouched state for boe_tv101wum_nm0 variant. --
commit 80218d28f8a5f485ff9423dca654f2257664a78b Author: Nickolay Goppen <[email protected]> drivers: gpu: drm: panel: Add BOE NT51021 driver Add driver for BOE NT51021-based 8-inch and 10-inch DSI video mode panels used in Xiaomi Mi Pad 4, Mi Pad 4 Plus and Amazon Fire HD 10 tablets. > diff --git a/drivers/gpu/drm/panel/panel-novatek-nt51021.c > b/drivers/gpu/drm/panel/panel-novatek-nt51021.c > new file mode 100644 > index 0000000000000..fc99908917868 > --- /dev/null > +++ b/drivers/gpu/drm/panel/panel-novatek-nt51021.c [ ... ] > +static int nt51021_novatek_off(struct novatek_nt51021_desc *ctx) > +{ > + struct mipi_dsi_multi_context dsi_ctx = { .dsi = ctx->dsi }; > + > + nt51021_cabc_off(&dsi_ctx); [Severity: Medium] The commit message mentions that for the boe_tv101wum_nm0 variant, CABC is untouched because the vendor drives it over I2C from the backlight path. While the initialization sequence for the nm0 variant correctly omits turning CABC on, this teardown sequence appears to unconditionally call nt51021_cabc_off() for all variants. When nt51021_cabc_off() is called, it executes: mipi_dsi_generic_write_seq_multi(dsi_ctx, 0x90, 0xc0); Could this unconditional write cause unexpected hardware states or DSI/I2C collisions during the display teardown for the nm0 variant, since the register was intended to be left alone? > + > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0xa5); > + mipi_dsi_msleep(&dsi_ctx, 20); > + mipi_dsi_dcs_set_display_off_multi(&dsi_ctx); > + mipi_dsi_msleep(&dsi_ctx, 130); > + mipi_dsi_dcs_enter_sleep_mode_multi(&dsi_ctx); > + mipi_dsi_msleep(&dsi_ctx, 70); > + mipi_dsi_generic_write_seq_multi(&dsi_ctx, 0x8f, 0x00); > + mipi_dsi_usleep_range(&dsi_ctx, 4000, 5000); > + > + return dsi_ctx.accum_err; > +} -- Sashiko AI review ยท https://sashiko.dev/#/patchset/20260913-qcom-novatek-nt51021-panels-v3-0-266bc5d7e...@mainlining.org?part=2
