在 2026-09-08二的 17:28 +0800，Joey Lu写道： > The Verisilicon DC IP family also ships in a DCUltraLite (DC8000 > generation) configuration that lacks the DC8200's CONFIG_EX staging > registers and PANEL_START sync register, and exposes its VSYNC > interrupt through a differently laid out status/enable register pair. > > Add a vs_dc_funcs implementation for the DC8000 generation in > vs_dc8000.c: framebuffer updates are latched directly through > FB_CONFIG's enable/reset/valid bits instead of a staging commit, > panel > output starts as soon as PANEL_CONFIG.RUNNING is set with no separate > sync register to arm, and the VSYNC interrupt is acknowledged through > DISP_IRQ_STA/DISP_IRQ_EN. Select this vtable in the probe path based > on the chip identity's generation field. > > Signed-off-by: Joey Lu <[email protected]>
Reviewed-by: Icenowy Zheng <[email protected]> Thanks, Icenowy > --- > drivers/gpu/drm/verisilicon/Makefile | 2 +- > drivers/gpu/drm/verisilicon/vs_dc.c | 5 +- > drivers/gpu/drm/verisilicon/vs_dc.h | 1 + > drivers/gpu/drm/verisilicon/vs_dc8000.c | 92 > +++++++++++++++++++++++++ > 4 files changed, 98 insertions(+), 2 deletions(-) > create mode 100644 drivers/gpu/drm/verisilicon/vs_dc8000.c > > diff --git a/drivers/gpu/drm/verisilicon/Makefile > b/drivers/gpu/drm/verisilicon/Makefile > index 9d4cd16452fa1..d2fd8e4dff242 100644 > --- a/drivers/gpu/drm/verisilicon/Makefile > +++ b/drivers/gpu/drm/verisilicon/Makefile > @@ -1,6 +1,6 @@ > # SPDX-License-Identifier: GPL-2.0-only > > -verisilicon-dc-objs := vs_bridge.o vs_crtc.o vs_dc.o vs_dc8200.o > vs_drm.o vs_hwdb.o \ > +verisilicon-dc-objs := vs_bridge.o vs_crtc.o vs_dc.o vs_dc8200.o > vs_dc8000.o vs_drm.o vs_hwdb.o \ > vs_plane.o vs_primary_plane.o vs_cursor_plane.o > > obj-$(CONFIG_DRM_VERISILICON_DC) += verisilicon-dc.o > diff --git a/drivers/gpu/drm/verisilicon/vs_dc.c > b/drivers/gpu/drm/verisilicon/vs_dc.c > index 9729b693d360e..3e9e2c0264f5d 100644 > --- a/drivers/gpu/drm/verisilicon/vs_dc.c > +++ b/drivers/gpu/drm/verisilicon/vs_dc.c > @@ -134,7 +134,10 @@ static int vs_dc_probe(struct platform_device > *pdev) > dev_info(dev, "Found DC%x rev %x customer %x\n", dc- > >identity.model, > dc->identity.revision, dc->identity.customer_id); > > - dc->funcs = &vs_dc8200_funcs; > + if (dc->identity.generation == VSDC_GEN_DC8200) > + dc->funcs = &vs_dc8200_funcs; > + else > + dc->funcs = &vs_dc8000_funcs; > > if (port_count > dc->identity.display_count) { > dev_err(dev, "too many downstream ports than HW > capability\n"); > diff --git a/drivers/gpu/drm/verisilicon/vs_dc.h > b/drivers/gpu/drm/verisilicon/vs_dc.h > index 825f5dd6bf174..ac96ad7011994 100644 > --- a/drivers/gpu/drm/verisilicon/vs_dc.h > +++ b/drivers/gpu/drm/verisilicon/vs_dc.h > @@ -66,5 +66,6 @@ struct vs_dc { > }; > > extern const struct vs_dc_funcs vs_dc8200_funcs; > +extern const struct vs_dc_funcs vs_dc8000_funcs; > > #endif /* _VS_DC_H_ */ > diff --git a/drivers/gpu/drm/verisilicon/vs_dc8000.c > b/drivers/gpu/drm/verisilicon/vs_dc8000.c > new file mode 100644 > index 0000000000000..df7bd5bdd7f2a > --- /dev/null > +++ b/drivers/gpu/drm/verisilicon/vs_dc8000.c > @@ -0,0 +1,92 @@ > +// SPDX-License-Identifier: GPL-2.0-only > +/* > + * Copyright (C) 2026 Joey Lu <[email protected]> > + */ > + > +#include <linux/regmap.h> > + > +#include <drm/drm_print.h> > + > +#include "vs_crtc_regs.h" > +#include "vs_dc.h" > +#include "vs_drm.h" > +#include "vs_primary_plane_regs.h" > + > +static void vs_dc8000_panel_enable_ex(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_set_bits(dc->regs, VSDC_FB_CONFIG(output), > + VSDC_FB_CONFIG_RESET); > +} > + > +static void vs_dc8000_panel_disable_ex(struct vs_dc *dc, unsigned > int output) > +{ > + regmap_clear_bits(dc->regs, VSDC_FB_CONFIG(output), > + VSDC_FB_CONFIG_RESET); > +} > + > +static void vs_dc8000_crtc_begin(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_set_bits(dc->regs, VSDC_FB_CONFIG(output), > + VSDC_FB_CONFIG_VALID); > +} > + > +static void vs_dc8000_crtc_flush(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_clear_bits(dc->regs, VSDC_FB_CONFIG(output), > + VSDC_FB_CONFIG_VALID); > +} > + > +static void vs_dc8000_crtc_enable_ex(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_set_bits(dc->regs, VSDC_FB_CONFIG(output), > + VSDC_FB_CONFIG_ENABLE); > +} > + > +static void vs_dc8000_crtc_disable_ex(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_clear_bits(dc->regs, VSDC_FB_CONFIG(output), > + VSDC_FB_CONFIG_ENABLE); > +} > + > +static void vs_dc8000_enable_vblank(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_set_bits(dc->regs, VSDC_DISP_IRQ_EN, > + VSDC_DISP_IRQ_VSYNC(output)); > +} > + > +static void vs_dc8000_disable_vblank(struct vs_dc *dc, unsigned int > output) > +{ > + regmap_clear_bits(dc->regs, VSDC_DISP_IRQ_EN, > + VSDC_DISP_IRQ_VSYNC(output)); > +} > + > +static u32 vs_dc8000_irq_ack(struct vs_dc *dc) > +{ > + u32 hw_irqs, unified = 0, known = 0; > + unsigned int i; > + > + regmap_read(dc->regs, VSDC_DISP_IRQ_STA, &hw_irqs); > + > + for (i = 0; i < VSDC_MAX_OUTPUTS; i++) { > + known |= VSDC_DISP_IRQ_VSYNC(i); > + if (hw_irqs & VSDC_DISP_IRQ_VSYNC(i)) > + unified |= VSDC_IRQ_VSYNC(i); > + } > + > + drm_WARN_ONCE(&dc->drm_dev->base, hw_irqs & ~known, > + "Unknown hardware IRQ bits: %#x\n", hw_irqs & > ~known); > + > + return unified; > +} > + > +const struct vs_dc_funcs vs_dc8000_funcs = { > + .panel_enable_ex = vs_dc8000_panel_enable_ex, > + .panel_disable_ex = vs_dc8000_panel_disable_ex, > + .crtc_begin = vs_dc8000_crtc_begin, > + .crtc_flush = vs_dc8000_crtc_flush, > + .crtc_enable_ex = vs_dc8000_crtc_enable_ex, > + .crtc_disable_ex = vs_dc8000_crtc_disable_ex, > + .enable_vblank = vs_dc8000_enable_vblank, > + .disable_vblank = vs_dc8000_disable_vblank, > + .irq_ack = vs_dc8000_irq_ack, > +};
