From: Joel Fernandes <[email protected]> Introduce a trait for GPU Page Table Entries (PTEs). New `read()`/`write()` helpers are provided that go through a `Pramin`).
The forthcoming MMU v2, v3 PTE structs will each implement `PteOps`, allowing the later page-table walker and mapper to call PTE operations. Signed-off-by: Joel Fernandes <[email protected]> [ecourtney: replace PraminWindow accesses with typed MMIO views] Signed-off-by: Eliot Courtney <[email protected]> --- drivers/gpu/nova-core/mm/pagetable.rs | 46 ++++++++++++++++++++++++++++++++++- 1 file changed, 45 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/nova-core/mm/pagetable.rs b/drivers/gpu/nova-core/mm/pagetable.rs index ed0f3d731c63..a23370b4b62d 100644 --- a/drivers/gpu/nova-core/mm/pagetable.rs +++ b/drivers/gpu/nova-core/mm/pagetable.rs @@ -8,9 +8,18 @@ #![expect(dead_code)] -use kernel::num::Bounded; +use kernel::{ + io::Io, + num::Bounded, + prelude::*, // +}; use crate::gpu::Architecture; +use crate::mm::{ + pramin, + Pfn, + VramAddress, // +}; /// Extracts the page table index at a given level from a virtual address. pub(super) trait VaLevelIndex { @@ -84,6 +93,41 @@ pub(super) const fn as_index(&self) -> u64 { } } +// Trait abstractions for page table operations. + +/// Operations on Page Table Entries (`PTE`s). +pub(super) trait PteOps: Copy + core::fmt::Debug + Into<u64> { + /// Create a `PTE` from a raw `u64` value. + fn from_raw(val: u64) -> Self; + + /// Create an invalid `PTE`. + fn invalid() -> Self; + + /// Create a valid `PTE` for the given memory aperture. + fn new(aperture: AperturePte, pfn: Pfn, writable: bool) -> Self; + + /// Check if this `PTE` is valid. + fn is_valid(&self) -> bool; + + /// Get the physical frame number. + fn frame_number(&self) -> Pfn; + + /// Read a `PTE` from VRAM. + fn read(pramin: &mut pramin::Pramin<'_>, addr: VramAddress) -> Result<Self> { + let val = pramin.window_at::<u64>(addr)?.view().read_val(); + Ok(Self::from_raw(val)) + } + + /// Write this `PTE` to VRAM. + fn write(&self, pramin: &mut pramin::Pramin<'_>, addr: VramAddress) -> Result { + pramin + .window_at::<u64>(addr)? + .view() + .write_val((*self).into()); + Ok(()) + } +} + /// Memory aperture for Page Table Entries (`PTE`s). /// /// Determines which memory region the `PTE` points to. -- 2.55.0
