Move away from generic pr prints to device context aware drm
versions.
Signed-off-by: Krzysztof Karas <[email protected]>
---
drivers/gpu/drm/i915/gt/selftest_rc6.c | 56 ++++---
drivers/gpu/drm/i915/gt/selftest_rps.c | 218 ++++++++++++++-----------
2 files changed, 156 insertions(+), 118 deletions(-)
diff --git a/drivers/gpu/drm/i915/gt/selftest_rc6.c
b/drivers/gpu/drm/i915/gt/selftest_rc6.c
index 90f30b988d68..9bdc22d61626 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rc6.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rc6.c
@@ -14,6 +14,8 @@
#include "selftests/i915_random.h"
#include "selftests/librapl.h"
+#include <drm/drm_print.h>
+
static u64 rc6_residency(struct intel_rc6 *rc6)
{
u64 result;
@@ -80,8 +82,9 @@ int live_rc6_manual(void *arg)
res[1] = rc6_residency(rc6);
rc0_freq = intel_rps_read_actual_frequency_fw(rps);
if ((res[1] - res[0]) >> 10) {
- pr_err("RC6 residency increased by %lldus while disabled for
1000ms!\n",
- (res[1] - res[0]) >> 10);
+ drm_err(>->i915->drm,
+ "RC6 residency increased by %lldus while disabled for
1000ms!\n",
+ (res[1] - res[0]) >> 10);
err = -EINVAL;
goto out_unlock;
}
@@ -92,10 +95,12 @@ int live_rc6_manual(void *arg)
if (!rc0_power) {
if (rc0_freq)
- pr_debug("No power measured while in RC0! GPU
Freq: %uMHz in RC0\n",
- rc0_freq);
+ drm_dbg(>->i915->drm,
+ "No power measured while in RC0! GPU
Freq: %uMHz in RC0\n",
+ rc0_freq);
else
- pr_err("No power and freq measured while in
RC0\n");
+ drm_err(>->i915->drm,
+ "No power and freq measured while in
RC0\n");
err = -EINVAL;
goto out_unlock;
}
@@ -114,32 +119,37 @@ int live_rc6_manual(void *arg)
dt = ktime_sub(ktime_get(), dt);
res[1] = rc6_residency(rc6);
if (res[1] == res[0]) {
- pr_err("Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x,
residency=%lld\n",
- intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE),
- intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL),
- res[0]);
+ drm_err(>->i915->drm,
+ "Did not enter RC6! RC6_STATE=%08x, RC6_CONTROL=%08x,
residency=%lld\n",
+ intel_uncore_read_fw(gt->uncore, GEN6_RC_STATE),
+ intel_uncore_read_fw(gt->uncore, GEN6_RC_CONTROL),
+ res[0]);
err = -EINVAL;
}
if (has_power) {
rc6_power = div64_u64(NSEC_PER_SEC * rc6_sample_energy[1],
ktime_to_ns(dt));
- pr_info("GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
- rc0_power, rc6_power);
+ drm_info(>->i915->drm,
+ "GPU consumed %lluuW in RC0 and %lluuW in RC6\n",
+ rc0_power, rc6_power);
if (2 * rc6_power > rc0_power) {
- pr_err("GPU leaked energy while in RC6!\n"
- "GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
- "RC0 energy before & after sleep respectively:
%lluuJ %lluuJ\n"
- "RC6 energy before & after sleep respectively:
%lluuJ %lluuJ\n",
- rc6_freq, rc0_freq, rc0_sample_energy[0],
rc0_sample_energy[1],
- rc6_sample_energy[0], rc6_sample_energy[1]);
+ drm_err(>->i915->drm,
+ "GPU leaked energy while in RC6!\n"
+ "GPU Freq: %uMHz in RC6 and %uMHz in RC0\n"
+ "RC0 energy before & after sleep respectively:
%lluuJ %lluuJ\n"
+ "RC6 energy before & after sleep respectively:
%lluuJ %lluuJ\n",
+ rc6_freq, rc0_freq,
+ rc0_sample_energy[0], rc0_sample_energy[1],
+ rc6_sample_energy[0], rc6_sample_energy[1]);
diff = res[1] - res[0];
threshold = (9 * NSEC_PER_MSEC * sleep_time) / 10;
if (diff < threshold)
- pr_err("Did not enter RC6 properly, RC6 start
residency=%lluns, RC6 end residency=%lluns\n",
- res[0], res[1]);
+ drm_err(>->i915->drm,
+ "Did not enter RC6 properly, RC6 start
residency=%lluns, RC6 end residency=%lluns\n",
+ res[0], res[1]);
err = -EINVAL;
goto out_unlock;
}
@@ -265,13 +275,13 @@ int live_rc6_ctx_wa(void *arg)
}
intel_gt_pm_wait_for_idle(gt);
- pr_debug("%s: CTX_INFO=%0x\n",
- engine->name, READ_ONCE(*res));
+ drm_dbg(&engine->i915->drm, "%s: CTX_INFO=%0x\n",
+ engine->name, READ_ONCE(*res));
if (resets !=
i915_reset_engine_count(error, engine)) {
- pr_err("%s: GPU reset required\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: GPU reset required\n",
engine->name);
add_taint_for_CI(gt->i915, TAINT_WARN);
err = -EIO;
goto out;
diff --git a/drivers/gpu/drm/i915/gt/selftest_rps.c
b/drivers/gpu/drm/i915/gt/selftest_rps.c
index be77fba2ec49..3edeae4f7fe0 100644
--- a/drivers/gpu/drm/i915/gt/selftest_rps.c
+++ b/drivers/gpu/drm/i915/gt/selftest_rps.c
@@ -6,6 +6,8 @@
#include <linux/pm_qos.h>
#include <linux/sort.h>
+#include <drm/drm_print.h>
+
#include "gem/i915_gem_internal.h"
#include "i915_reg.h"
@@ -204,12 +206,12 @@ static void show_pstate_limits(struct intel_rps *rps)
struct drm_i915_private *i915 = rps_to_i915(rps);
if (IS_BROXTON(i915)) {
- pr_info("P_STATE_CAP[%x]: 0x%08x\n",
+ drm_info(&i915->drm, "P_STATE_CAP[%x]: 0x%08x\n",
i915_mmio_reg_offset(BXT_RP_STATE_CAP),
intel_uncore_read(rps_to_uncore(rps),
BXT_RP_STATE_CAP));
} else if (GRAPHICS_VER(i915) == 9) {
- pr_info("P_STATE_LIMITS[%x]: 0x%08x\n",
+ drm_info(&i915->drm, "P_STATE_LIMITS[%x]: 0x%08x\n",
i915_mmio_reg_offset(GEN9_RP_STATE_LIMITS),
intel_uncore_read(rps_to_uncore(rps),
GEN9_RP_STATE_LIMITS));
@@ -264,8 +266,8 @@ int live_rps_clock_interval(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS spinner did not start\n",
engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -290,8 +292,9 @@ int live_rps_clock_interval(void *arg)
GEN6_RP_CUR_UP_EI),
10)) {
/* Just skip the test; assume lack of HW support */
- pr_notice("%s: rps evaluation interval not ticking\n",
- engine->name);
+ drm_notice(&engine->i915->drm,
+ "%s: rps evaluation interval not ticking\n",
+ engine->name);
err = -ENODEV;
} else {
ktime_t dt_[5];
@@ -330,21 +333,24 @@ int live_rps_clock_interval(void *arg)
u32 expected =
intel_gt_ns_to_pm_interval(gt, dt);
- pr_info("%s: rps counted %d C0 cycles [%lldns] in
%lldns [%d cycles], using GT clock frequency of %uKHz\n",
- engine->name, cycles, time, dt, expected,
- gt->clock_frequency / 1000);
+ drm_info(&engine->i915->drm,
+ "%s: rps counted %d C0 cycles [%lldns] in
%lldns [%d cycles], using GT clock frequency of %uKHz\n",
+ engine->name, cycles, time, dt, expected,
+ gt->clock_frequency / 1000);
if (10 * time < 8 * dt ||
8 * time > 10 * dt) {
- pr_err("%s: rps clock time does not match
walltime!\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: rps clock time does not match
walltime!\n",
+ engine->name);
err = -EINVAL;
}
if (10 * expected < 8 * cycles ||
8 * expected > 10 * cycles) {
- pr_err("%s: walltime does not match rps clock
ticks!\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: walltime does not match rps clock
ticks!\n",
+ engine->name);
err = -EINVAL;
}
}
@@ -424,8 +430,8 @@ int live_rps_control(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS spinner did not start\n",
engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -434,8 +440,9 @@ int live_rps_control(void *arg)
}
if (rps_set_check(rps, rps->min_freq) != rps->min_freq) {
- pr_err("%s: could not set minimum frequency [%x], only
%x!\n",
- engine->name, rps->min_freq, read_cagf(rps));
+ drm_err(&engine->i915->drm,
+ "%s: could not set minimum frequency [%x], only
%x!\n",
+ engine->name, rps->min_freq, read_cagf(rps));
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
show_pstate_limits(rps);
@@ -451,8 +458,9 @@ int live_rps_control(void *arg)
limit = rps_set_check(rps, f);
if (rps_set_check(rps, rps->min_freq) != rps->min_freq) {
- pr_err("%s: could not restore minimum frequency [%x],
only %x!\n",
- engine->name, rps->min_freq, read_cagf(rps));
+ drm_err(&engine->i915->drm,
+ "%s: could not restore minimum frequency [%x],
only %x!\n",
+ engine->name, rps->min_freq, read_cagf(rps));
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
show_pstate_limits(rps);
@@ -474,7 +482,8 @@ int live_rps_control(void *arg)
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
- pr_info("%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz], %x:%x
response %lluns:%lluns\n",
+ drm_info(&engine->i915->drm,
+ "%s: range:[%x:%uMHz, %x:%uMHz] limit:[%x:%uMHz],
%x:%x response %lluns:%lluns\n",
engine->name,
rps->min_freq, intel_gpu_freq(rps, rps->min_freq),
rps->max_freq, intel_gpu_freq(rps, rps->max_freq),
@@ -483,8 +492,9 @@ int live_rps_control(void *arg)
if (limit != rps->max_freq) {
if (throttle)
- pr_warn("%s: GPU throttled with reasons
0x%08x\n",
- engine->name, throttle);
+ drm_warn(&engine->i915->drm,
+ "%s: GPU throttled with reasons
0x%08x\n",
+ engine->name, throttle);
show_pstate_limits(rps);
}
@@ -523,14 +533,14 @@ static void show_pcu_config(struct intel_rps *rps)
wakeref = intel_runtime_pm_get(rps_to_uncore(rps)->rpm);
- pr_info("%5s %5s %5s\n", "GPU", "eCPU", "eRing");
+ drm_info(&i915->drm, "%5s %5s %5s\n", "GPU", "eCPU", "eRing");
for (gpu_freq = min_gpu_freq; gpu_freq <= max_gpu_freq; gpu_freq++) {
int ia_freq = gpu_freq;
snb_pcode_read(rps_to_gt(rps)->uncore,
GEN6_PCODE_READ_MIN_FREQ_TABLE,
&ia_freq, NULL);
- pr_info("%5d %5d %5d\n",
+ drm_info(&i915->drm, "%5d %5d %5d\n",
gpu_freq * 50,
((ia_freq >> 0) & 0xff) * 100,
((ia_freq >> 8) & 0xff) * 100);
@@ -669,8 +679,8 @@ int live_rps_frequency_cs(void *arg)
if (wait_for(intel_uncore_read(engine->uncore, CS_GPR(0)),
10)) {
- pr_err("%s: timed loop did not start\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: timed loop did not start\n", engine->name);
goto err_vma;
}
@@ -680,7 +690,8 @@ int live_rps_frequency_cs(void *arg)
max.freq = rps->max_freq;
max.count = measure_cs_frequency_at(rps, engine, &max.freq);
- pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
+ drm_info(&engine->i915->drm,
+ "%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz
[%d%%]\n",
engine->name,
min.count, intel_gpu_freq(rps, min.freq),
max.count, intel_gpu_freq(rps, max.freq),
@@ -692,10 +703,11 @@ int live_rps_frequency_cs(void *arg)
2, 3)) {
int f;
- pr_err("%s: CS did not scale with frequency! scaled
min:%llu, max:%llu\n",
- engine->name,
- max.freq * min.count,
- min.freq * max.count);
+ drm_err(&engine->i915->drm,
+ "%s: CS did not scale with frequency! scaled
min:%llu, max:%llu\n",
+ engine->name,
+ max.freq * min.count,
+ min.freq * max.count);
show_pcu_config(rps);
for (f = min.freq + 1; f <= rps->max_freq; f++) {
@@ -706,7 +718,8 @@ int live_rps_frequency_cs(void *arg)
if (act < f)
break;
- pr_info("%s: %x:%uMHz: %lluKHz [%d%%]\n",
+ drm_info(&engine->i915->drm,
+ "%s: %x:%uMHz: %lluKHz [%d%%]\n",
engine->name,
act, intel_gpu_freq(rps, act), count,
(int)DIV64_U64_ROUND_CLOSEST(100 *
min.freq * count,
@@ -807,8 +820,8 @@ int live_rps_frequency_srm(void *arg)
goto err_vma;
if (wait_for(READ_ONCE(*cntr), 10)) {
- pr_err("%s: timed loop did not start\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: timed loop did not start\n", engine->name);
goto err_vma;
}
@@ -818,7 +831,8 @@ int live_rps_frequency_srm(void *arg)
max.freq = rps->max_freq;
max.count = measure_frequency_at(rps, cntr, &max.freq);
- pr_info("%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz [%d%%]\n",
+ drm_info(&engine->i915->drm,
+ "%s: min:%lluKHz @ %uMHz, max:%lluKHz @ %uMHz
[%d%%]\n",
engine->name,
min.count, intel_gpu_freq(rps, min.freq),
max.count, intel_gpu_freq(rps, max.freq),
@@ -830,10 +844,11 @@ int live_rps_frequency_srm(void *arg)
1, 2)) {
int f;
- pr_err("%s: CS did not scale with frequency! scaled
min:%llu, max:%llu\n",
- engine->name,
- max.freq * min.count,
- min.freq * max.count);
+ drm_err(&engine->i915->drm,
+ "%s: CS did not scale with frequency! scaled
min:%llu, max:%llu\n",
+ engine->name,
+ max.freq * min.count,
+ min.freq * max.count);
show_pcu_config(rps);
for (f = min.freq + 1; f <= rps->max_freq; f++) {
@@ -844,7 +859,8 @@ int live_rps_frequency_srm(void *arg)
if (act < f)
break;
- pr_info("%s: %x:%uMHz: %lluKHz [%d%%]\n",
+ drm_info(&engine->i915->drm,
+ "%s: %x:%uMHz: %lluKHz [%d%%]\n",
engine->name,
act, intel_gpu_freq(rps, act), count,
(int)DIV64_U64_ROUND_CLOSEST(100 *
min.freq * count,
@@ -915,31 +931,31 @@ static int __rps_up_interrupt(struct intel_rps *rps,
i915_request_add(rq);
if (!igt_wait_for_spinner(spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS spinner did not start\n", engine->name);
i915_request_put(rq);
intel_gt_set_wedged(engine->gt);
return -EIO;
}
if (!intel_rps_is_active(rps)) {
- pr_err("%s: RPS not enabled on starting spinner\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS not enabled on starting spinner\n",
engine->name);
igt_spinner_end(spin);
i915_request_put(rq);
return -EINVAL;
}
if (!(rps->pm_events & GEN6_PM_RP_UP_THRESHOLD)) {
- pr_err("%s: RPS did not register UP interrupt\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS did not register UP interrupt\n",
engine->name);
i915_request_put(rq);
return -EINVAL;
}
if (rps->last_freq != rps->min_freq) {
- pr_err("%s: RPS did not program min frequency\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS did not program min frequency\n",
engine->name);
i915_request_put(rq);
return -EINVAL;
}
@@ -955,17 +971,19 @@ static int __rps_up_interrupt(struct intel_rps *rps,
i915_request_put(rq);
if (rps->cur_freq != rps->min_freq) {
- pr_err("%s: Frequency unexpectedly changed [up], now %d!\n",
- engine->name, intel_rps_read_actual_frequency(rps));
+ drm_err(&engine->i915->drm,
+ "%s: Frequency unexpectedly changed [up], now %d!\n",
+ engine->name, intel_rps_read_actual_frequency(rps));
return -EINVAL;
}
if (!(rps->pm_iir & GEN6_PM_RP_UP_THRESHOLD)) {
- pr_err("%s: UP interrupt not recorded for spinner, pm_iir:%x,
prev_up:%x, up_threshold:%x, up_ei:%x\n",
- engine->name, rps->pm_iir,
- intel_uncore_read(uncore, GEN6_RP_PREV_UP),
- intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
- intel_uncore_read(uncore, GEN6_RP_UP_EI));
+ drm_err(&engine->i915->drm,
+ "%s: UP interrupt not recorded for spinner, pm_iir:%x,
prev_up:%x, up_threshold:%x, up_ei:%x\n",
+ engine->name, rps->pm_iir,
+ intel_uncore_read(uncore, GEN6_RP_PREV_UP),
+ intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
+ intel_uncore_read(uncore, GEN6_RP_UP_EI));
return -EINVAL;
}
@@ -981,14 +999,14 @@ static int __rps_down_interrupt(struct intel_rps *rps,
rps_set_check(rps, rps->max_freq);
if (!(rps->pm_events & GEN6_PM_RP_DOWN_THRESHOLD)) {
- pr_err("%s: RPS did not register DOWN interrupt\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS did not register DOWN interrupt\n",
engine->name);
return -EINVAL;
}
if (rps->last_freq != rps->max_freq) {
- pr_err("%s: RPS did not program max frequency\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS did not program max frequency\n",
engine->name);
return -EINVAL;
}
@@ -999,21 +1017,23 @@ static int __rps_down_interrupt(struct intel_rps *rps,
sleep_for_ei(rps, timeout);
if (rps->cur_freq != rps->max_freq) {
- pr_err("%s: Frequency unexpectedly changed [down], now %d!\n",
- engine->name,
- intel_rps_read_actual_frequency(rps));
+ drm_err(&engine->i915->drm,
+ "%s: Frequency unexpectedly changed [down], now %d!\n",
+ engine->name,
+ intel_rps_read_actual_frequency(rps));
return -EINVAL;
}
if (!(rps->pm_iir & (GEN6_PM_RP_DOWN_THRESHOLD |
GEN6_PM_RP_DOWN_TIMEOUT))) {
- pr_err("%s: DOWN interrupt not recorded for idle, pm_iir:%x,
prev_down:%x, down_threshold:%x, down_ei:%x [prev_up:%x, up_threshold:%x,
up_ei:%x]\n",
- engine->name, rps->pm_iir,
- intel_uncore_read(uncore, GEN6_RP_PREV_DOWN),
- intel_uncore_read(uncore, GEN6_RP_DOWN_THRESHOLD),
- intel_uncore_read(uncore, GEN6_RP_DOWN_EI),
- intel_uncore_read(uncore, GEN6_RP_PREV_UP),
- intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
- intel_uncore_read(uncore, GEN6_RP_UP_EI));
+ drm_err(&engine->i915->drm,
+ "%s: DOWN interrupt not recorded for idle, pm_iir:%x,
prev_down:%x, down_threshold:%x, down_ei:%x [prev_up:%x, up_threshold:%x,
up_ei:%x]\n",
+ engine->name, rps->pm_iir,
+ intel_uncore_read(uncore, GEN6_RP_PREV_DOWN),
+ intel_uncore_read(uncore, GEN6_RP_DOWN_THRESHOLD),
+ intel_uncore_read(uncore, GEN6_RP_DOWN_EI),
+ intel_uncore_read(uncore, GEN6_RP_PREV_UP),
+ intel_uncore_read(uncore, GEN6_RP_UP_THRESHOLD),
+ intel_uncore_read(uncore, GEN6_RP_UP_EI));
return -EINVAL;
}
@@ -1043,7 +1063,8 @@ int live_rps_interrupt(void *arg)
with_intel_gt_pm(gt, wakeref)
pm_events = rps->pm_events;
if (!pm_events) {
- pr_err("No RPS PM events registered, but RPS is enabled?\n");
+ drm_err(>->i915->drm,
+ "No RPS PM events registered, but RPS is enabled?\n");
return -ENODEV;
}
@@ -1186,8 +1207,8 @@ int live_rps_power(void *arg)
i915_request_add(rq);
if (!igt_wait_for_spinner(&spin, rq)) {
- pr_err("%s: RPS spinner did not start\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: RPS spinner did not start\n",
engine->name);
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
intel_gt_set_wedged(engine->gt);
@@ -1207,29 +1228,33 @@ int live_rps_power(void *arg)
igt_spinner_end(&spin);
st_engine_heartbeat_enable(engine);
- pr_info("%s: min:%llumW @ %uMHz, max:%llumW @ %uMHz\n",
+ drm_info(&engine->i915->drm, "%s: min:%llumW @ %uMHz,
max:%llumW @ %uMHz\n",
engine->name,
min.power, intel_gpu_freq(rps, min.freq),
max.power, intel_gpu_freq(rps, max.freq));
if (10 * min.freq >= 9 * max.freq) {
- pr_notice("Could not control frequency, ran at
[%d:%uMHz, %d:%uMhz]\n",
- min.freq, intel_gpu_freq(rps, min.freq),
- max.freq, intel_gpu_freq(rps, max.freq));
+ drm_notice(&engine->i915->drm,
+ "Could not control frequency, ran at
[%d:%uMHz, %d:%uMhz]\n",
+ min.freq, intel_gpu_freq(rps, min.freq),
+ max.freq, intel_gpu_freq(rps, max.freq));
if (throttle)
- pr_warn("%s: GPU throttled with reasons
0x%08x\n",
- engine->name, throttle);
+ drm_warn(&engine->i915->drm,
+ "%s: GPU throttled with reasons
0x%08x\n",
+ engine->name, throttle);
continue;
}
if (11 * min.power > 10 * max.power) {
- pr_err("%s: did not conserve power when setting lower
frequency!\n",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: did not conserve power when setting lower
frequency!\n",
+ engine->name);
if (throttle)
- pr_warn("%s: GPU throttled with reasons
0x%08x\n",
- engine->name, throttle);
+ drm_warn(&engine->i915->drm,
+ "%s: GPU throttled with reasons
0x%08x\n",
+ engine->name, throttle);
err = -EINVAL;
break;
@@ -1273,9 +1298,9 @@ int live_rps_dynamic(void *arg)
return -ENOMEM;
if (intel_rps_has_interrupts(rps))
- pr_info("RPS has interrupt support\n");
+ drm_info(>->i915->drm, "RPS has interrupt support\n");
if (intel_rps_uses_timer(rps))
- pr_info("RPS has timer support\n");
+ drm_info(>->i915->drm, "RPS has timer support\n");
for_each_engine(engine, gt, id) {
struct i915_request *rq;
@@ -1318,19 +1343,22 @@ int live_rps_dynamic(void *arg)
min.freq = wait_for_freq(rps, rps->min_freq, 2000);
min.dt = ktime_sub(ktime_get(), min.dt);
- pr_info("%s: dynamically reclocked to %u:%uMHz while busy in
%lluns, and %u:%uMHz while idle in %lluns\n",
- engine->name,
- max.freq, intel_gpu_freq(rps, max.freq),
- ktime_to_ns(max.dt),
- min.freq, intel_gpu_freq(rps, min.freq),
- ktime_to_ns(min.dt));
+ drm_info(&engine->i915->drm,
+ "%s: dynamically reclocked to %u:%uMHz while busy in
%lluns, and %u:%uMHz while idle in %lluns\n",
+ engine->name,
+ max.freq, intel_gpu_freq(rps, max.freq),
+ ktime_to_ns(max.dt),
+ min.freq, intel_gpu_freq(rps, min.freq),
+ ktime_to_ns(min.dt));
if (min.freq >= max.freq) {
- pr_err("%s: dynamic reclocking of spinner failed\n!",
- engine->name);
+ drm_err(&engine->i915->drm,
+ "%s: dynamic reclocking of spinner failed\n!",
+ engine->name);
if (throttle)
- pr_warn("%s: GPU throttled with reasons
0x%08x\n",
- engine->name, throttle);
+ drm_warn(&engine->i915->drm,
+ "%s: GPU throttled with reasons
0x%08x\n",
+ engine->name, throttle);
err = -EINVAL;
}
--
2.34.1
