Update the HPD interrupt mute/unmute routines to accept an irq_type bitmask parameter, allowing selective per-bit mask control instead of operating on all HPD interrupt bits unconditionally.
With IRQF_ONESHOT handling IRQ line masking during threaded handler execution, these helpers are no longer needed in the runtime IRQ path. They are retained for init-time use by analogix_dp_config_interrupt() to configure platform-specific HPD interrupt masks. Signed-off-by: Damon Ding <[email protected]> --- Changes in v2: - Update commit messages to align with newly added IRQF_ONESHOT related commit. --- .../drm/bridge/analogix/analogix_dp_core.h | 4 +- .../gpu/drm/bridge/analogix/analogix_dp_reg.c | 59 ++++++++++++++----- 2 files changed, 46 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h index ecb86a6c1fc3..2066e575ce10 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_core.h @@ -183,8 +183,8 @@ void analogix_dp_init_interrupt(struct analogix_dp_device *dp); void analogix_dp_reset(struct analogix_dp_device *dp); void analogix_dp_swreset(struct analogix_dp_device *dp); void analogix_dp_config_interrupt(struct analogix_dp_device *dp); -void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp); -void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp); +void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp, u32 irq_type); +void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp, u32 irq_type); int analogix_dp_wait_pll_locked(struct analogix_dp_device *dp); void analogix_dp_set_pll_power_down(struct analogix_dp_device *dp, bool enable); void analogix_dp_set_analog_power_down(struct analogix_dp_device *dp, diff --git a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c index 024f342da461..816be79a8da6 100644 --- a/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c +++ b/drivers/gpu/drm/bridge/analogix/analogix_dp_reg.c @@ -197,30 +197,59 @@ void analogix_dp_config_interrupt(struct analogix_dp_device *dp) writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); } -void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp) +void analogix_dp_mute_hpd_interrupt(struct analogix_dp_device *dp, u32 irq_type) { - u32 reg; + u32 reg, mask = 0; - /* 0: mask, 1: unmask */ - reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); - reg &= ~COMMON_INT_MASK_4; - writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); + if (!irq_type) + return; - reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); - reg &= ~INT_STA_MASK; - writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); + if (irq_type & COMMON_INT_4_HPD_IRQ) { + /* 0: mask, 1: unmask */ + reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); + if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN) + mask |= PLUG; + if (irq_type & DP_IRQ_TYPE_HP_CABLE_OUT) + mask |= HPD_LOST; + if (irq_type & DP_IRQ_TYPE_HP_CHANGE) + mask |= HOTPLUG_CHG; + reg &= ~mask; + writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); + } + + if (irq_type & DP_IRQ_TYPE_IRQ_HPD) { + /* 0: mask, 1: unmask */ + reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); + reg &= ~INT_HPD; + writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); + } } -void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp) +void analogix_dp_unmute_hpd_interrupt(struct analogix_dp_device *dp, u32 irq_type) { u32 reg; - /* 0: mask, 1: unmask */ - reg = COMMON_INT_MASK_4; - writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); + if (!irq_type) + return; - reg = INT_STA_MASK; - writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); + if (irq_type & COMMON_INT_4_HPD_IRQ) { + /* 0: mask, 1: unmask */ + reg = readl(dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); + if (irq_type & DP_IRQ_TYPE_HP_CABLE_IN) + reg |= PLUG; + if (irq_type & DP_IRQ_TYPE_HP_CABLE_OUT) + reg |= HPD_LOST; + if (irq_type & DP_IRQ_TYPE_HP_CHANGE) + reg |= HOTPLUG_CHG; + writel(reg, dp->reg_base + ANALOGIX_DP_COMMON_INT_MASK_4); + } + + if (irq_type & DP_IRQ_TYPE_IRQ_HPD) { + /* 0: mask, 1: unmask */ + reg = readl(dp->reg_base + ANALOGIX_DP_INT_STA_MASK); + reg |= INT_HPD; + writel(reg, dp->reg_base + ANALOGIX_DP_INT_STA_MASK); + } } int analogix_dp_wait_pll_locked(struct analogix_dp_device *dp) -- 2.34.1
