On Mon, 22 Jun 2026 at 11:16, Krzysztof Kozlowski <[email protected]> wrote: > > There is no use of double colon '::' in YAML. OTOH, the literal style > block, e.g. using '|' treats all characters as content [1] therefore > single use of ':' in descriptions is perfectly fine, whenever '|' is > used. > > Cleanup existing code, so the confusing style won't be re-used in new > contributions. > > Link: https://yaml.org/spec/1.2.2/#literal-style [1] > Signed-off-by: Krzysztof Kozlowski <[email protected]> > > --- > > I split the patches to avoid bounces from mailing list due to email size. > > This can go via clock tree (no dependencies)... or both could go via > Rob's tree. > ---
Reviewed-by: Peter Griffin <[email protected]> (for Samsung parts) > .../devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-apq8064.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-apq8084.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-ipq6018.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-ipq8064.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-mdm9607.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-mdm9615.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-msm8660.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-msm8909.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-msm8916.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-msm8953.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-msm8974.yaml | 2 +- > .../devicetree/bindings/clock/qcom,gcc-sdm660.yaml | 2 +- > Documentation/devicetree/bindings/clock/qcom,gpucc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,ipq5018-gcc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,ipq9574-gcc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,qca8k-nsscc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml | 2 +- > Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml | 2 +- > .../devicetree/bindings/clock/qcom,sm8350-videocc.yaml | 2 +- > Documentation/devicetree/bindings/clock/qcom,videocc.yaml | 2 +- > .../devicetree/bindings/clock/samsung,exynos5260-clock.yaml | 6 +++--- > .../devicetree/bindings/clock/samsung,exynos5410-clock.yaml | 2 +- > .../devicetree/bindings/clock/samsung,exynos5433-clock.yaml | 2 +- > .../devicetree/bindings/clock/samsung,exynos7-clock.yaml | 2 +- > .../devicetree/bindings/clock/samsung,exynos850-clock.yaml | 2 +- > .../bindings/clock/samsung,exynosautov9-clock.yaml | 2 +- > .../bindings/clock/samsung,exynosautov920-clock.yaml | 2 +- > .../devicetree/bindings/clock/samsung,s5pv210-clock.yaml | 2 +- > 32 files changed, 34 insertions(+), 34 deletions(-) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > index 53a5ab319159..6863db9bd092 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,dispcc-sm8x50.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm display clock control module provides the clocks, resets and power > domains on SM8150/SM8250/SM8350. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,dispcc-sm8150.h > include/dt-bindings/clock/qcom,dispcc-sm8250.h > include/dt-bindings/clock/qcom,dispcc-sm8350.h > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml > index 27df7e3e5bf3..68532244901e 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8064.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on APQ8064. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-msm8960.h > include/dt-bindings/reset/qcom,gcc-msm8960.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml > index 0a0a26d9beab..1c022e75fd71 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-apq8084.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on APQ8084. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-apq8084.h > include/dt-bindings/reset/qcom,gcc-apq8084.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml > index 4d2614d4f368..c7fb84438db7 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq6018.yaml > @@ -15,7 +15,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on IPQ6018. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-ipq6018.h > include/dt-bindings/reset/qcom,gcc-ipq6018.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > index a71557395c01..b4d3175780bc 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-ipq8064.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on IPQ8064. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) > include/dt-bindings/reset/qcom,gcc-ipq806x.h (qcom,gcc-ipq8064) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml > index d7da30b0e7ee..0a7be7583bdd 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9607.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-mdm9607.h > > allOf: > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml > index 418dea31eb62..0656d5ee448d 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-mdm9615.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-mdm9615.h > > allOf: > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml > index e03b6d0acdb6..70c9da1f35c2 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8660.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks and resets on > MSM8660 > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-msm8660.h > include/dt-bindings/reset/qcom,gcc-msm8660.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml > index ce1f5a60bd8c..2edb6c251d99 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8909.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on MSM8909, MSM8917 or QM215. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-msm8909.h > include/dt-bindings/clock/qcom,gcc-msm8917.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml > index 258b6b93deca..af4b639ea8c3 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8916.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on MSM8916 or MSM8939. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-msm8916.h > include/dt-bindings/clock/qcom,gcc-msm8939.h > include/dt-bindings/reset/qcom,gcc-msm8916.h > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml > index ced3118c8580..fc0360554f68 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8953.yaml > @@ -15,7 +15,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on MSM8937, MSM8940, MSM8953 or SDM439. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-msm8917.h > include/dt-bindings/clock/qcom,gcc-msm8953.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml > index 929fafc84c19..378dfe7854ac 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-msm8974.yaml > @@ -15,7 +15,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on MSM8974 (all variants) and MSM8226. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and > qcom,gcc-msm8974) > include/dt-bindings/reset/qcom,gcc-msm8974.h (qcom,gcc-msm8226 and > qcom,gcc-msm8974) > > diff --git a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml > b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml > index 724ce0491118..72aaf699cf70 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gcc-sdm660.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on SDM630, SDM636 and SDM660 > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gcc-sdm660.h (qcom,gcc-sdm630 and > qcom,gcc-sdm660) > > $ref: qcom,gcc.yaml# > diff --git a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > index 4cdff6161bf0..3ac4419009a9 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,gpucc.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm graphics clock control module provides the clocks, resets and > power > domains on Qualcomm SoCs. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,gpucc-sdm845.h > include/dt-bindings/clock/qcom,gpucc-sa8775p.h > include/dt-bindings/clock/qcom,gpucc-sc7180.h > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml > b/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml > index 489d0fc5607c..9925b931ecad 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq5018-gcc.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on IPQ5018 > > - See also:: > + See also: > include/dt-bindings/clock/qcom,ipq5018-gcc.h > include/dt-bindings/reset/qcom,ipq5018-gcc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml > b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml > index 27ae9938febc..5b128fa841aa 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-gcc.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm global clock control module provides the clocks, resets and power > domains on IPQ9574 > > - See also:: > + See also: > include/dt-bindings/clock/qcom,ipq9574-gcc.h > include/dt-bindings/reset/qcom,ipq9574-gcc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml > b/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml > index 61473385da2d..3da10c364a85 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,qca8k-nsscc.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm NSS clock control module provides the clocks and resets > on QCA8386(switch mode)/QCA8084(PHY mode) > > - See also:: > + See also: > include/dt-bindings/clock/qcom,qca8k-nsscc.h > include/dt-bindings/reset/qcom,qca8k-nsscc.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml > b/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml > index 734880805c1b..bedbdabef672 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,qcm2290-gpucc.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm graphics clock control module provides the clocks, resets and > power > domains on Qualcomm SoCs. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,qcm2290-gpucc.h > > properties: > diff --git a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml > b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml > index ab97d4b7dba8..b6c835bfd0d9 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,rpmcc.yaml > @@ -12,7 +12,7 @@ maintainers: > > description: | > The clock enumerators are defined in <dt-bindings/clock/qcom,rpmcc.h> and > - come in pairs:: FOO_CLK followed by FOO_A_CLK. The latter clock is > + come in pairs: FOO_CLK followed by FOO_A_CLK. The latter clock is > an "active" clock, which means that the consumer only care that the clock > is > available when the apps CPU subsystem is active, i.e. not suspended or in > deep idle. If it is important that the clock keeps running during system > diff --git > a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > index 99ab9106009f..fd06ac9bceb9 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sc7280-lpasscorecc.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm LPASS core and audio clock control module provides the clocks and > power domains on SC7280. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,lpasscorecc-sc7280.h > include/dt-bindings/clock/qcom,lpassaudiocc-sc7280.h > > diff --git > a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > index 273d66e245c5..f235b4e24cc7 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sc8280xp-lpasscc.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm LPASS core and audio clock control module provides the clocks, > and reset on SC8280XP. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,lpasscc-sc8280xp.h > > properties: > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml > b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml > index 8cbab3fbb660..d7e1938b5e1b 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sm6115-lpasscc.yaml > @@ -14,7 +14,7 @@ description: | > Qualcomm LPASS core and audio clock controllers provide audio-related > resets > on SM6115 and its derivatives. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,sm6115-lpasscc.h > > properties: > diff --git a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml > b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml > index 5c2ecec0624e..a986ab4ce7c7 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm video clock control module provides the clocks, resets and power > domains on Qualcomm SoCs. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,videocc-sm8350.h > include/dt-bindings/reset/qcom,videocc-sm8350.h > > diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml > b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml > index f4ff9acef9d5..124d259fc85e 100644 > --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml > +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml > @@ -13,7 +13,7 @@ description: | > Qualcomm video clock control module provides the clocks, resets and power > domains on Qualcomm SoCs. > > - See also:: > + See also: > include/dt-bindings/clock/qcom,sm6350-videocc.h > include/dt-bindings/clock/qcom,videocc-sc7180.h > include/dt-bindings/clock/qcom,videocc-sc7280.h > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml > index b05f83533e3d..56ab972c3da5 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos5260-clock.yaml > @@ -14,17 +14,17 @@ maintainers: > > description: | > Expected external clocks, defined in DTS as fixed-rate clocks with a > matching > - name:: > + name: > - "fin_pll" - PLL input clock from XXTI > - "xrtcxti" - input clock from XRTCXTI > - "ioclk_pcm_extclk" - pcm external operation clock > - "ioclk_spdif_extclk" - spdif external operation clock > - "ioclk_i2s_cdclk" - i2s0 codec clock > > - Phy clocks:: > + Phy clocks: > There are several clocks which are generated by specific PHYs. These > clocks > are fed into the clock controller and then routed to the hardware blocks. > - These clocks are defined as fixed clocks in the driver with following > names:: > + These clocks are defined as fixed clocks in the driver with following > names: > - "phyclk_dptx_phy_ch3_txd_clk" - dp phy clock for channel 3 > - "phyclk_dptx_phy_ch2_txd_clk" - dp phy clock for channel 2 > - "phyclk_dptx_phy_ch1_txd_clk" - dp phy clock for channel 1 > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml > index b737c9d35a1c..1d907dd8fbf1 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos5410-clock.yaml > @@ -14,7 +14,7 @@ maintainers: > > description: | > Expected external clocks, defined in DTS as fixed-rate clocks with a > matching > - name:: > + name: > - "fin_pll" - PLL input clock from XXTI > > All available clocks are defined as preprocessor macros in > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml > index 3f9326e09f79..8a289f1e2ace 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos5433-clock.yaml > @@ -14,7 +14,7 @@ maintainers: > > description: | > Expected external clocks, defined in DTS as fixed-rate clocks with a > matching > - name:: > + name: > - "oscclk" - PLL input clock from XXTI > > All available clocks are defined as preprocessor macros in > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml > index c137c6744ef9..a51cd4fafb41 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos7-clock.yaml > @@ -14,7 +14,7 @@ maintainers: > > description: | > Expected external clocks, defined in DTS as fixed-rate clocks with a > matching > - name:: > + name: > - "fin_pll" - PLL input clock from XXTI > > All available clocks are defined as preprocessor macros in > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml > index cdc5ded59fe5..68c2fd318765 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynos850-clock.yaml > @@ -17,7 +17,7 @@ description: | > Exynos850 clock controller is comprised of several CMU units, generating > clocks for different domains. Those CMU units are modeled as separate > device > tree nodes, and might depend on each other. Root clocks in that clock tree > are > - two external clocks:: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external > + two external clocks: OSCCLK (26 MHz) and RTCCLK (32768 Hz). Those external > clocks must be defined as fixed-rate clocks in dts. > > CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs > and > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml > index 32f39e543b36..e9d17d48b4f3 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov9-clock.yaml > @@ -17,7 +17,7 @@ description: | > Exynos Auto v9 clock controller is comprised of several CMU units, > generating > clocks for different domains. Those CMU units are modeled as separate > device > tree nodes, and might depend on each other. Root clocks in that clock tree > are > - two external clocks:: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz). > + two external clocks: OSCCLK/XTCXO (26 MHz) and RTCCLK/XrtcXTI (32768 Hz). > The external OSCCLK must be defined as fixed-rate clock in dts. > > CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs > and > diff --git > a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml > index 6b1fc61a2ff9..475db824d4d3 100644 > --- > a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml > +++ > b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml > @@ -17,7 +17,7 @@ description: | > ExynosAuto v920 clock controller is comprised of several CMU units, > generating > clocks for different domains. Those CMU units are modeled as separate > device > tree nodes, and might depend on each other. Root clocks in that clock tree > are > - two external clocks:: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 > Hz). > + two external clocks: OSCCLK/XTCXO (38.4 MHz) and RTCCLK/XrtcXTI (32768 Hz). > The external OSCCLK must be defined as fixed-rate clock in dts. > > CMU_TOP is a top-level CMU, where all base clocks are prepared using PLLs > and > diff --git > a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml > b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml > index 67a33665cf00..b1617d96d3fb 100644 > --- a/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml > +++ b/Documentation/devicetree/bindings/clock/samsung,s5pv210-clock.yaml > @@ -14,7 +14,7 @@ maintainers: > > description: | > Expected external clocks, defined in DTS as fixed-rate clocks with a > matching > - name:: > + name: > - "xxti" - external crystal oscillator connected to XXTI and XXTO pins of > the SoC, > - "xusbxti" - external crystal oscillator connected to XUSBXTI and > XUSBXTO > -- > 2.53.0 >
