> On 6 Jul 2026, at 09:44, Gary Guo <[email protected]> wrote:
>
> Most users would more commonly reach out to a view of `Mmio` rather than an
> owned instance of `Mmio`. Only implementor of `Io` like `Bar` or `IoMem`
implementor -> implementors
> would need the owned version. Thus, rename `Mmio` to `MmioOwned` so that
> the name `Mmio` can be used for the view type instead.
>
> Reviewed-by: Alexandre Courbot <[email protected]>
> Signed-off-by: Gary Guo <[email protected]>
> ---
> rust/kernel/devres.rs | 6 ++--
> rust/kernel/io.rs | 77 +++++++++++++++++++++++-----------------------
> rust/kernel/io/mem.rs | 8 ++---
> rust/kernel/io/poll.rs | 8 ++---
> rust/kernel/io/register.rs | 24 +++++++--------
> rust/kernel/pci/io.rs | 6 ++--
> 6 files changed, 65 insertions(+), 64 deletions(-)
>
> diff --git a/rust/kernel/devres.rs b/rust/kernel/devres.rs
> index d0c677fd7932..aed0c994fd30 100644
> --- a/rust/kernel/devres.rs
> +++ b/rust/kernel/devres.rs
> @@ -68,7 +68,7 @@ struct Inner<T> {
> /// devres::Devres,
> /// io::{
> /// Io,
> -/// Mmio,
> +/// MmioOwned,
> /// MmioRaw,
> /// PhysAddr,
> /// Region, //
> @@ -105,11 +105,11 @@ struct Inner<T> {
> /// }
> ///
> /// impl<const SIZE: usize> Deref for IoMem<SIZE> {
> -/// type Target = Mmio<SIZE>;
> +/// type Target = MmioOwned<SIZE>;
> ///
> /// fn deref(&self) -> &Self::Target {
> /// // SAFETY: The memory range stored in `self` has been properly
> mapped in `Self::new`.
> -/// unsafe { Mmio::from_raw(&self.0) }
> +/// unsafe { MmioOwned::from_raw(&self.0) }
> /// }
> /// }
> /// # fn no_run(dev: &Device<Bound>) -> Result<(), Error> {
> diff --git a/rust/kernel/io.rs b/rust/kernel/io.rs
> index 12be266d7ed7..f93be7f78069 100644
> --- a/rust/kernel/io.rs
> +++ b/rust/kernel/io.rs
> @@ -94,8 +94,8 @@ fn size(p: *const Self) -> usize {
> /// the represented MMIO region does exist or is properly mapped.
> ///
> /// Instead, the bus specific MMIO implementation must convert this raw
> representation into an
> -/// `Mmio` instance providing the actual memory accessors. Only by the
> conversion into an `Mmio`
> -/// structure any guarantees are given.
> +/// `MmioOwned` instance providing the actual memory accessors. Only by the
> conversion into an
> +/// `MmioOwned` structure any guarantees are given.
> pub struct MmioRaw<T: ?Sized> {
> /// Pointer is in I/O address space.
> ///
> @@ -170,7 +170,7 @@ pub fn size(&self) -> usize {
> /// ffi::c_void,
> /// io::{
> /// Io,
> -/// Mmio,
> +/// MmioOwned,
> /// MmioRaw,
> /// PhysAddr,
> /// Region,
> @@ -206,11 +206,11 @@ pub fn size(&self) -> usize {
> /// }
> ///
> /// impl<const SIZE: usize> Deref for IoMem<SIZE> {
> -/// type Target = Mmio<SIZE>;
> +/// type Target = MmioOwned<SIZE>;
> ///
> /// fn deref(&self) -> &Self::Target {
> /// // SAFETY: The memory range stored in `self` has been properly
> mapped in `Self::new`.
> -/// unsafe { Mmio::from_raw(&self.0) }
> +/// unsafe { MmioOwned::from_raw(&self.0) }
> /// }
> /// }
> ///
> @@ -224,7 +224,7 @@ pub fn size(&self) -> usize {
> /// # }
> /// ```
> #[repr(transparent)]
> -pub struct Mmio<const SIZE: usize = 0>(MmioRaw<Region<SIZE>>);
> +pub struct MmioOwned<const SIZE: usize = 0>(MmioRaw<Region<SIZE>>);
>
> /// Checks whether an access of type `U` at the given `base` and the given
> `offset`
> /// is valid within this region.
> @@ -537,10 +537,10 @@ fn write64(self, value: u64, offset: usize)
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> - /// fn do_reads(io: &Mmio) -> Result {
> + /// fn do_reads(io: &MmioOwned) -> Result {
> /// // 32-bit read from address `0x10`.
> /// let v: u32 = io.try_read(0x10)?;
> ///
> @@ -571,10 +571,10 @@ fn try_read<T, L>(self, location: L) -> Result<T>
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> - /// fn do_writes(io: &Mmio) -> Result {
> + /// fn do_writes(io: &MmioOwned) -> Result {
> /// // 32-bit write of value `1` at address `0x10`.
> /// io.try_write(0x10, 1u32)?;
> ///
> @@ -609,7 +609,7 @@ fn try_write<T, L>(self, location: L, value: T) -> Result
> /// use kernel::io::{
> /// register,
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> /// register! {
> @@ -625,7 +625,7 @@ fn try_write<T, L>(self, location: L, value: T) -> Result
> /// }
> /// }
> ///
> - /// fn do_write_reg(io: &Mmio) -> Result {
> + /// fn do_write_reg(io: &MmioOwned) -> Result {
> ///
> /// io.try_write_reg(VERSION::new(1, 0))
> /// }
> @@ -654,10 +654,10 @@ fn try_write_reg<T, L, V>(self, value: V) -> Result
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> - /// fn do_update(io: &Mmio<0x1000>) -> Result {
> + /// fn do_update(io: &MmioOwned<0x1000>) -> Result {
> /// io.try_update(0x10, |v: u32| {
> /// v + 1
> /// })
> @@ -691,10 +691,10 @@ fn try_update<T, L, F>(self, location: L, f: F) ->
> Result
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> - /// fn do_reads(io: &Mmio<0x1000>) {
> + /// fn do_reads(io: &MmioOwned<0x1000>) {
> /// // 32-bit read from address `0x10`.
> /// let v: u32 = io.read(0x10);
> ///
> @@ -723,10 +723,10 @@ fn read<T, L>(self, location: L) -> T
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> - /// fn do_writes(io: &Mmio<0x1000>) {
> + /// fn do_writes(io: &MmioOwned<0x1000>) {
> /// // 32-bit write of value `1` at address `0x10`.
> /// io.write(0x10, 1u32);
> ///
> @@ -757,7 +757,7 @@ fn write<T, L>(self, location: L, value: T)
> /// use kernel::io::{
> /// register,
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> /// register! {
> @@ -773,7 +773,7 @@ fn write<T, L>(self, location: L, value: T)
> /// }
> /// }
> ///
> - /// fn do_write_reg(io: &Mmio<0x1000>) {
> + /// fn do_write_reg(io: &MmioOwned<0x1000>) {
> /// io.write_reg(VERSION::new(1, 0));
> /// }
> /// ```
> @@ -801,10 +801,10 @@ fn write_reg<T, L, V>(self, value: V)
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// };
> ///
> - /// fn do_update(io: &Mmio<0x1000>) {
> + /// fn do_update(io: &MmioOwned<0x1000>) {
> /// io.update(0x10, |v: u32| {
> /// v + 1
> /// })
> @@ -847,19 +847,19 @@ unsafe fn io_write(self, value: $ty, address: usize) {
> }
>
> // MMIO regions support 8, 16, and 32-bit accesses.
> -impl_mmio_io_capable!(Mmio, u8, readb, writeb);
> -impl_mmio_io_capable!(Mmio, u16, readw, writew);
> -impl_mmio_io_capable!(Mmio, u32, readl, writel);
> +impl_mmio_io_capable!(MmioOwned, u8, readb, writeb);
> +impl_mmio_io_capable!(MmioOwned, u16, readw, writew);
> +impl_mmio_io_capable!(MmioOwned, u32, readl, writel);
> // MMIO regions on 64-bit systems also support 64-bit accesses.
> impl_mmio_io_capable!(
> - Mmio,
> + MmioOwned,
> #[cfg(CONFIG_64BIT)]
> u64,
> readq,
> writeq
> );
>
> -impl<'a, const SIZE: usize> Io for &'a Mmio<SIZE> {
> +impl<'a, const SIZE: usize> Io for &'a MmioOwned<SIZE> {
> type Target = Region<SIZE>;
>
> /// Returns the base address of this mapping.
> @@ -875,27 +875,28 @@ fn maxsize(self) -> usize {
> }
> }
>
> -impl<const SIZE: usize> Mmio<SIZE> {
> - /// Converts an `MmioRaw` into an `Mmio` instance, providing the
> accessors to the MMIO mapping.
> +impl<const SIZE: usize> MmioOwned<SIZE> {
> + /// Converts an `MmioRaw` into an `MmioOwned` instance, providing the
> accessors to the MMIO
> + /// mapping.
> ///
> /// # Safety
> ///
> /// Callers must ensure that `addr` is the start of a valid I/O mapped
> memory region of size
> /// `maxsize`.
> pub unsafe fn from_raw(raw: &MmioRaw<Region<SIZE>>) -> &Self {
> - // SAFETY: `Mmio` is a transparent wrapper around `MmioRaw`.
> + // SAFETY: `MmioOwned` is a transparent wrapper around `MmioRaw`.
> unsafe { &*core::ptr::from_ref(raw).cast() }
> }
> }
>
> -/// [`Mmio`] wrapper using relaxed accessors.
> +/// [`MmioOwned`] wrapper using relaxed accessors.
> ///
> /// This type provides an implementation of [`Io`] that uses relaxed I/O MMIO
> operands instead of
> /// the regular ones.
> ///
> -/// See [`Mmio::relaxed`] for a usage example.
> +/// See [`MmioOwned::relaxed`] for a usage example.
> #[repr(transparent)]
> -pub struct RelaxedMmio<const SIZE: usize = 0>(Mmio<SIZE>);
> +pub struct RelaxedMmio<const SIZE: usize = 0>(MmioOwned<SIZE>);
>
> impl<'a, const SIZE: usize> Io for &'a RelaxedMmio<SIZE> {
> type Target = Region<SIZE>;
> @@ -911,7 +912,7 @@ fn maxsize(self) -> usize {
> }
> }
>
> -impl<const SIZE: usize> Mmio<SIZE> {
> +impl<const SIZE: usize> MmioOwned<SIZE> {
> /// Returns a [`RelaxedMmio`] reference that performs relaxed I/O
> operations.
> ///
> /// Relaxed accessors do not provide ordering guarantees with respect to
> DMA or memory accesses
> @@ -922,19 +923,19 @@ impl<const SIZE: usize> Mmio<SIZE> {
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> - /// Mmio,
> + /// MmioOwned,
> /// RelaxedMmio,
> /// };
> ///
> - /// fn do_io(io: &Mmio<0x100>) {
> + /// fn do_io(io: &MmioOwned<0x100>) {
> /// // The access is performed using `readl_relaxed` instead of
> `readl`.
> /// let v = io.relaxed().read32(0x10);
> /// }
> ///
> /// ```
> pub fn relaxed(&self) -> &RelaxedMmio<SIZE> {
> - // SAFETY: `RelaxedMmio` is `#[repr(transparent)]` over `Mmio`, so
> `Mmio<SIZE>` and
> - // `RelaxedMmio<SIZE>` have identical layout.
> + // SAFETY: `RelaxedMmio` is `#[repr(transparent)]` over `MmioOwned`,
> so `MmioOwned<SIZE>`
> + // and `RelaxedMmio<SIZE>` have identical layout.
> unsafe { core::mem::transmute(self) }
> }
> }
> diff --git a/rust/kernel/io/mem.rs b/rust/kernel/io/mem.rs
> index 9e15bc8fde78..8f6c257c5b8e 100644
> --- a/rust/kernel/io/mem.rs
> +++ b/rust/kernel/io/mem.rs
> @@ -16,7 +16,7 @@
> Region,
> Resource, //
> },
> - Mmio,
> + MmioOwned,
> MmioRaw, //
> },
> prelude::*,
> @@ -211,7 +211,7 @@ pub fn into_devres(self) ->
> Result<Devres<ExclusiveIoMem<'static, SIZE>>> {
> }
>
> impl<const SIZE: usize> Deref for ExclusiveIoMem<'_, SIZE> {
> - type Target = Mmio<SIZE>;
> + type Target = MmioOwned<SIZE>;
>
> fn deref(&self) -> &Self::Target {
> &self.iomem
> @@ -291,10 +291,10 @@ fn drop(&mut self) {
> }
>
> impl<const SIZE: usize> Deref for IoMem<'_, SIZE> {
> - type Target = Mmio<SIZE>;
> + type Target = MmioOwned<SIZE>;
>
> fn deref(&self) -> &Self::Target {
> // SAFETY: Safe as by the invariant of `IoMem`.
> - unsafe { Mmio::from_raw(&self.io) }
> + unsafe { MmioOwned::from_raw(&self.io) }
> }
> }
> diff --git a/rust/kernel/io/poll.rs b/rust/kernel/io/poll.rs
> index 75d1b3e8596c..79828a8006b5 100644
> --- a/rust/kernel/io/poll.rs
> +++ b/rust/kernel/io/poll.rs
> @@ -47,14 +47,14 @@
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> -/// Mmio,
> +/// MmioOwned,
> /// poll::read_poll_timeout, //
> /// };
> /// use kernel::time::Delta;
> ///
> /// const HW_READY: u16 = 0x01;
> ///
> -/// fn wait_for_hardware<const SIZE: usize>(io: &Mmio<SIZE>) -> Result {
> +/// fn wait_for_hardware<const SIZE: usize>(io: &MmioOwned<SIZE>) -> Result {
> /// read_poll_timeout(
> /// // The `op` closure reads the value of a specific status register.
> /// || io.try_read16(0x1000),
> @@ -134,14 +134,14 @@ pub fn read_poll_timeout<Op, Cond, T>(
> /// ```no_run
> /// use kernel::io::{
> /// Io,
> -/// Mmio,
> +/// MmioOwned,
> /// poll::read_poll_timeout_atomic, //
> /// };
> /// use kernel::time::Delta;
> ///
> /// const HW_READY: u16 = 0x01;
> ///
> -/// fn wait_for_hardware<const SIZE: usize>(io: &Mmio<SIZE>) -> Result {
> +/// fn wait_for_hardware<const SIZE: usize>(io: &MmioOwned<SIZE>) -> Result {
> /// read_poll_timeout_atomic(
> /// // The `op` closure reads the value of a specific status register.
> /// || io.try_read16(0x1000),
> diff --git a/rust/kernel/io/register.rs b/rust/kernel/io/register.rs
> index 1159e5168ef9..fd3bf6220f95 100644
> --- a/rust/kernel/io/register.rs
> +++ b/rust/kernel/io/register.rs
> @@ -58,7 +58,7 @@
> //! },
> //! num::Bounded,
> //! };
> -//! # use kernel::io::Mmio;
> +//! # use kernel::io::MmioOwned;
> //! # register! {
> //! # pub BOOT_0(u32) @ 0x00000100 {
> //! # 15:8 vendor_id;
> @@ -66,7 +66,7 @@
> //! # 3:0 minor_revision;
> //! # }
> //! # }
> -//! # fn test(io: &Mmio<0x1000>) {
> +//! # fn test(io: &MmioOwned<0x1000>) {
> //! # fn obtain_vendor_id() -> u8 { 0xff }
> //!
> //! // Read from the register's defined offset (0x100).
> @@ -446,7 +446,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// Io,
> /// },
> /// };
> -/// # use kernel::io::Mmio;
> +/// # use kernel::io::MmioOwned;
> ///
> /// register! {
> /// FIXED_REG(u32) @ 0x100 {
> @@ -455,7 +455,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// }
> /// }
> ///
> -/// # fn test(io: &Mmio<0x1000>) {
> +/// # fn test(io: &MmioOwned<0x1000>) {
> /// let val = io.read(FIXED_REG);
> ///
> /// // Write from an already-existing value.
> @@ -559,7 +559,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// Io,
> /// },
> /// };
> -/// # use kernel::io::Mmio;
> +/// # use kernel::io::MmioOwned;
> ///
> /// // Type used to identify the base.
> /// pub struct CpuCtlBase;
> @@ -584,7 +584,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// }
> /// }
> ///
> -/// # fn test(io: Mmio<0x1000>) {
> +/// # fn test(io: MmioOwned<0x1000>) {
> /// // Read the status of `Cpu0`.
> /// let cpu0_started = io.read(CPU_CTL::of::<Cpu0>());
> ///
> @@ -601,7 +601,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// }
> /// }
> ///
> -/// # fn test2(io: Mmio<0x1000>) {
> +/// # fn test2(io: MmioOwned<0x1000>) {
> /// // Start the aliased `CPU0`, leaving its other fields untouched.
> /// io.update(CPU_CTL_ALIAS::of::<Cpu0>(), |r| r.with_alias_start(true));
> /// # }
> @@ -638,7 +638,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// Io,
> /// },
> /// };
> -/// # use kernel::io::Mmio;
> +/// # use kernel::io::MmioOwned;
> /// # fn get_scratch_idx() -> usize {
> /// # 0x15
> /// # }
> @@ -651,7 +651,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// }
> /// }
> ///
> -/// # fn test(io: &Mmio<0x1000>)
> +/// # fn test(io: &MmioOwned<0x1000>)
> /// # -> Result<(), Error>{
> /// // Read scratch register 0, i.e. I/O address `0x80`.
> /// let scratch_0 = io.read(SCRATCH::at(0)).value();
> @@ -724,7 +724,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// Io,
> /// },
> /// };
> -/// # use kernel::io::Mmio;
> +/// # use kernel::io::MmioOwned;
> /// # fn get_scratch_idx() -> usize {
> /// # 0x15
> /// # }
> @@ -752,7 +752,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// }
> /// }
> ///
> -/// # fn test(io: &Mmio<0x1000>) -> Result<(), Error> {
> +/// # fn test(io: &MmioOwned<0x1000>) -> Result<(), Error> {
> /// // Read scratch register 0 of CPU0.
> /// let scratch = io.read(CPU_SCRATCH::of::<Cpu0>().at(0));
> ///
> @@ -794,7 +794,7 @@ fn into_io_op(self) -> (FixedRegisterLoc<T>, T) {
> /// }
> /// }
> ///
> -/// # fn test2(io: &Mmio<0x1000>) -> Result<(), Error> {
> +/// # fn test2(io: &MmioOwned<0x1000>) -> Result<(), Error> {
> /// let cpu0_status = io.read(CPU_FIRMWARE_STATUS::of::<Cpu0>()).status();
> /// # Ok(())
> /// # }
> diff --git a/rust/kernel/pci/io.rs b/rust/kernel/pci/io.rs
> index 42f840d64a6f..e0acb62f58a2 100644
> --- a/rust/kernel/pci/io.rs
> +++ b/rust/kernel/pci/io.rs
> @@ -10,7 +10,7 @@
> io::{
> Io,
> IoCapable,
> - Mmio,
> + MmioOwned,
> MmioRaw,
> Region, //
> },
> @@ -242,11 +242,11 @@ fn drop(&mut self) {
> }
>
> impl<const SIZE: usize> Deref for Bar<'_, SIZE> {
> - type Target = Mmio<SIZE>;
> + type Target = MmioOwned<SIZE>;
>
> fn deref(&self) -> &Self::Target {
> // SAFETY: By the type invariant of `Self`, the MMIO range in
> `self.io` is properly mapped.
> - unsafe { Mmio::from_raw(&self.io) }
> + unsafe { MmioOwned::from_raw(&self.io) }
> }
> }
>
>
> --
> 2.54.0
>
Reviewed-by: Daniel Almeida <[email protected]>
