On 7/2/2026 9:10 PM, Zhiping Zhang wrote:
External email: Use caution opening links or attachments Peer-to-peer DMA between a mlx5 NIC and a foreign PCIe endpoint (typically a GPU or a vfio-pci passthrough device) traverses the host PCIe fabric. The endpoint exporting the dma-buf knows which PCIe TLP Processing Hint (TPH) Steering Tag yields the best placement for the traffic it will sink: per-endpoint hint selection lets the root complex or switch direct DMA to a specific cache slice / NUMA node, cutting cross-socket snoop traffic and DRAM pressure under sustained p2p workloads. Until now the mlx5 importer had no way to learn the exporter's chosen ST tag, so dma-buf MRs were registered without TPH and ran with the default (no-hint) routing. With dma_buf_get_pci_tph() in place this patch wires up mlx5_ib to query that metadata at MR registration time for p2p access and use it to program requester-side TPH on the outbound mkey. If the exporter has no metadata, fall back to the existing no-TPH path so behavior for non-TPH-aware exporters is unchanged. Use mlx5_st_alloc_index_by_tag() to translate exporter-provided steering tags into local ST entries when table mode is active, and add mlx5_st_get_index() for DMAH-backed flows that already carry an ST index. For TPH-backed FRMRs, keep the extra ST-table reference tied to MR lifetime rather than pooled mkey lifetime. Acquire the ref before MR creation and release it again when the MR is returned to the pool or the backing mkey is destroyed, while leaving the generic FRMR pool core unchanged. Import the DMA_BUF namespace for the new dma_buf_get_pci_tph() call so modular mlx5_ib builds link cleanly. Signed-off-by: Zhiping Zhang <[email protected]> --- drivers/infiniband/hw/mlx5/main.c | 1 + drivers/infiniband/hw/mlx5/mr.c | 116 +++++++++++++++++- .../net/ethernet/mellanox/mlx5/core/lib/st.c | 49 ++++++-- include/linux/mlx5/driver.h | 15 +++ 4 files changed, 167 insertions(+), 14 deletions(-)
Reviewed-by: Michael Gur <[email protected]> Thanks.
