On Tue, Mar 31, 2026 at 05:28:51PM +0530, Nautiyal, Ankit K wrote:
> 
> On 3/31/2026 12:24 AM, Ville Syrjälä wrote:
> > On Mon, Mar 30, 2026 at 09:36:52AM +0530, Ankit Nautiyal wrote:
> >> Panel Replay requires the AS SDP transmission time to be written into
> >> PANEL_REPLAY_CONFIG3. This field was previously not programmed.
> >>
> >> Use the AS SDP transmission-time helper to populate CONFIG3.
> >>
> >> Signed-off-by: Ankit Nautiyal <[email protected]>
> >> ---
> >>   drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
> >>   1 file changed, 2 insertions(+), 1 deletion(-)
> >>
> >> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
> >> b/drivers/gpu/drm/i915/display/intel_psr.c
> >> index ca054135ca30..34b0993d9b1d 100644
> >> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> >> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> >> @@ -783,7 +783,7 @@ static void _panel_replay_enable_sink(struct intel_dp 
> >> *intel_dp,
> >>                                  const struct intel_crtc_state *crtc_state)
> >>   {
> >>    struct intel_display *display = to_intel_display(intel_dp);
> >> -  u8 panel_replay_config[2];
> >> +  u8 panel_replay_config[3];
> >>    int ret;
> >>   
> >>    panel_replay_config[0] = DP_PANEL_REPLAY_ENABLE |
> >> @@ -792,6 +792,7 @@ static void _panel_replay_enable_sink(struct intel_dp 
> >> *intel_dp,
> >>                             DP_PANEL_REPLAY_RFB_STORAGE_ERROR_EN |
> >>                             DP_PANEL_REPLAY_ACTIVE_FRAME_CRC_ERROR_EN;
> >>    panel_replay_config[1] = DP_PANEL_REPLAY_CRC_VERIFICATION;
> >> +  panel_replay_config[2] = intel_dp_as_sdp_transmission_time();
> > PANEL_REPLAY_CONFIG3 0x11a
> > ...
> > PANEL_REPLAY_CONFIG1 0x1b0
> > PANEL_REPLAY_CONFIG2 0x1b1
> >
> > So apparently we can't do the burst write for all three :/
> >
> > Looks like 0x1b2 is not used for anything so don't really understand
> > why it wasn't added there. Oh well.
> 
> 
> Oops! My bad. Thanks for catching this blunder.
> 
> I would also move the definition of PANEL_REPLAY_CONFIG3 above the 
> PANEL_REPLAY_CONFIG.
> 
> I guess I didn’t pay any attention on the offset at all, and assumed 
> this would follow PANEL_REPLAY_CONFIG2 :(

Yeah, I did the same mistake when reading the previous version and
suggesting the burst write. But at least we can still do the burst
write for PANEL_REPLAY_CONFIG1+PANEL_REPLAY_CONFIG2, so my suggestion
wasn't entirely wrong :)

> 
> Will be careful and will not repeat this again.
> 
> 
> Thanks,
> Ankit
> 
> >
> >>   
> >>    if (crtc_state->has_sel_update)
> >>            panel_replay_config[0] |= DP_PANEL_REPLAY_SU_ENABLE;
> >> -- 
> >> 2.45.2

-- 
Ville Syrjälä
Intel

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